Microchip Technology

The KSZ8091 is a single-supply 10Base-T/100Base-TX Ethernet physical-layer transceiver for transmission and reception of data over standard CAT-5 unshielded twisted pair (UTP) cable. The KSZ8091 is a highly-integrated PHY solution. It reduces board cost and simplifies board layout by using on-chip termination resistors for the differential pairs, integrating a low-noise regulator to supply the 1.2V core and by offering a flexible 1.8/2.5/3.3V digital I/O interface. The KSZ8091MNX and KSZ8091MLX offer the Media Independent Interface (MII), while the the KSZ8091RNx offer the Reduced Media Independent Interface (RMII) for direct connection with MII/RMII-compliant Ethernet MAC processors and switches. Wake-on-LAN (WOL) provides a mechanism for the KSZ8091 to wake up a system that is in standby power mode. The KSZ8091 provides diagnostic features to facilitate system bring-up and debugging in production testing and in product deployment. Parametric NAND tree support enables fault detection between KSZ8091 I/Os and the board. Microchip's LinkMD® TDR-based cable diagnostics identify faulty copper cabling. The KSZ8091RNA and KSZ8091RND are available in a 24-pin (4mm x 4mm) QFN package. The KSZ8091MNX and KSZ8091RNB are available in a 32-pin, lead-free QFN packages. The KSZ8091MLX is available in a 48-pin (7mm x 7mm) LQFP package. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The KSZ8441 product is an IEEE 1588v2-enabled Ethernet controller device with an internal MAC and PHY that provides integrated communication and synchronization for a range of industrial Ethernet applications. The KSZ8441 product enables end-point connection in a centralized topology. A flexible 8-bit or 16-bit interface is provided for interfacing to an external host processor. The KSZ8441 devices incorporate the IEEE 1588v2 protocol. Sub-microsecond synchronization is available via the use of hardware-based time stamping and transparent clocks making it the ideal solution for time-synchronized layer 2 communication in critical industrial applications. Extensive general purpose input/output (GPIO) capabilities are available to use with the IEEE 1588v2 PTP to efficiently and accurately interface to locally-connected devices. Complementing the industry’s most integrated IEEE 1588v2 device is a precision timing protocol (PTP) v2 software stack that has been pre-qualified with the KSZ84xx product family. The PTP stack has been optimized around the KSZ84xx chip architecture, and is available in source code format along with Microchip's chip driver. The KSZ8441 is built upon Microchip's industry-leading Ethernet technology, with features designed-to-offload host processing and streamline overall design, including: • 1 integrated 10/100BASE-TX PHY transceiver, featuring the industry’s lowest power consumption • Flexible management options that support common standard interfaces • A robust assortment of power management features including energy-efficient Ethernet (EEE) have been designed in to satisfy energy-efficient environments Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The KSZ8462 EtherSynch® product line consists of IEEE 1588v2-enabled Ethernet switches, providing integrated communications and synchronization for a range of industrial Ethernet applications. A flexible 8- or 16−bit general bus interface is provided for interfacing to an external host processor. The KSZ8462 EtherSynch product enables distributed, daisy−chained topologies preferred for Industrial Ethernet networks. Conventional centralized (i.e., star−wired) topologies are also supported for dual−homed, fault tolerant arrangements. The KSZ8462 devices incorporate the IEEE 1588v2 protocol. Sub-microsecond synchronization is available via the use of hardware based time stamping and transparent clocks making it the ideal solution for time synchronized Layer 2 communication in critical industrial applications. Extensive general purpose I/O (GPIO) capabilities are available to use with the IEEE 1588v2 PTP to efficiently and accurately interface to locally connected devices. Complementing the industry’s most-integrated IEEE 1588v2 device is a precision timing protocol (PTP) v2 software stack that has been pre−qualified with the KSZ84xx product family. The PTP stack has been optimized around the KSZ84xx chip architecture, and is available in source code format along with Microchip's chip driver. The wire−speed, store−and−forward switching fabric provides a full complement of quality-of-service (QoS) and congestion control features optimized for real−time Ethernet. The KSZ8462 product is built upon Microchip's industry−leading Ethernet technology, with features designed to offload host processing and streamline your overall design: • Wire−speed Ethernet switching fabric with extensive filtering • Two integrated 10/100BASE-TX PHY transceivers, featuring the industry’s lowest power consumption • Full−featured QoS support • Flexible management options that support common standard interfaces • A robust assortment of power-management features including energy-efficient Ethernet (EEE) have been designed in to satisfy energy-efficient environments Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The KSZ8463 EtherSynch® product line consists of IEEE 1588v2 enabled Ethernet switches, providing integrated communications and synchronization for a range of Industrial Ethernet applications. The KSZ8463 EtherSynch product line enables distributed, daisy-chained topologies preferred for Industrial Ethernet networks. Conventional centralized (i.e., star-wired) topologies are also supported for dual-homed, fault-tolerant arrangements. A flexible set of standard MAC interfaces is provided to interface to external host processors with embedded Ethernet MACs: • KSZ8463ML: Media Independent Interface (MII) • KSZ8463RL: Reduced Media Independent Interface (RMII) • KSZ8463FML: MII, supports 100BASE-FX fiber in addition to 10/100BASE-TX copper • KSZ8463FRL: RMII, supports 100BASE-FX fiber in addition to 10/100BASE-TX copper The KSZ8463 devices incorporate the IEEE 1588v2 protocol. Sub-microsecond synchronization is available via the use of hardware-based time-stamping and transparent clocks making it the ideal solution for time synchronized Layer 2 communication in critical industrial applications. Extensive general purpose I/O (GPIO) capabilities are available to use with the IEEE 1588v2 PTP to efficiently and accurately interface to locally connected devices. Complementing the industry’s most-integrated IEEE 1588v2 device is a precision timing protocol (PTP) v2 software stack that has been pre-qualified with the KSZ84xx product family. The PTP stack has been optimized around the KSZ84xx chip architecture, and is available in source code format along with Microchip's chip driver. The KSZ8463 product line is built upon Microchip's industry-leading Ethernet technology, with features designed to offload host processing and streamline your overall design. • Wire-speed Ethernet switching fabric with extensive filtering • Two integrated 10/100BASE-TX PHY transceivers, featuring the industry’s lowest power consumption • Full-featured quality-of-service (QoS) support • Flexible management options that support common standard interfaces The wire-speed, store-and-forward switching fabric provides a full complement of QoS and congestion control features optimized for real-time Ethernet. A robust assortment of power-management features including energy-efficient Ethernet (EEE) have been designed in to satisfy energy efficient environments. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.

The KSZ8567 is a fully integrated layer 2, managed, seven-port 10/100 Ethernet switch with numerous advanced features, designed to exceed Automotive AEC-Q100 Grade 2 (-40°C to +105°C) and EMC requirements. Five of the seven ports incorporate 10/100 Mbps PHYs. The other two ports have 1000 Mbps MAC interfaces that can be configured as SGMII, RGMII, MII or RMII. Either of these may connect directly to a host processor or to an external PHY. Full register access is available by SPI or I²C interfaces, and by optional in-band management via any of the data ports. PHY register access is provided by a MIIM interface. Security features include support for IEEE 802.1X port-based authentication and Access Control List (ACL) filtering. As a member of the EtherSynch® product family, the KSZ8567 incorporates full hardware support for the IEEE 1588v2 Precision Time Protocol (PTP), including hardware time-stamping at all PHY-MAC interfaces, and a high-resolution hardware "PTP clock". IEEE 1588 provides sub-microsecond synchronization for a range of industrial Ethernet applications. The KSZ8567 fully supports the IEEE family of audio video bridging (AVB) standards, which provide for high quality of service (QoS) for latency sensitive traffic streams over Ethernet. Time-stamping and time-keeping features support IEEE 802.1AS time synchronization. All ports feature credit based traffic shapers for IEEE 802.1Qav, and a time aware scheduler as proposed for IEEE 802.1Qbv. An assortment of power-management features including Energy-Efficient Ethernet (EEE) have been designed in to satisfy energy efficient environments. Microchip's complimentary and confidential [MicroCHECK](https://www.microchip.com/en-us/support/design-help/design-check-services) design review service, which offers insight from the initial concept to the final PCB layout, is available to customers who are using our products in their projects. You can confidently submit your design materials in a secure and private setting, and our expert engineers will provide individualized feedback to enhance your design. MicroCHECK design review service is subject to Microchip's [Program Terms and Conditions](https://www.microchip.com/en-us/support/design-help/design-check-services/design-check-services-program-terms-and-conditions) and requires a myMicrochip account.