Microchip Technology

[ZL30642B](https://www.microchip.com/en-us/product/ZL30642B) is recommended as the replacement for new designs. The ZL30612 offers two DPLL channels of Synchronous Ethernet (SyncE) clock translation. Fourth generation timing technology provides one third the jitter of the previous generation devices with a 40% smaller footprint. Excellent jitter performance makes this device ideally suited for SyncE/Sonet/SDH timing and line card applications needing to support 10G/40G and 100G PHYs. Features supported include hitless reference switching between active and redundant timing cards, frequency translation from backplane clock to frequencies required by PHY devices, jitter filtering, and holdover in case both active and redundant timing cards fail. Log in to our [MyMicrochip](https://login.microchip.com/ssologin/Account/Login?ReturnUrl=%2Fssologin%2Fconnect%2Fauthorize%2Fcallback%3Fclient_id%3DAuthenticatedUserapi%26redirect_uri%3Dhttps%253A%252F%252Fwww.microchip.com%252Fmymicrochip%252F%2523%252Fcallback%26response_type%3Dcode%26scope%3Dopenid%2520profile%2520AuthenticatedUserapi%26state%3Dd0743a67132a4f7cabf87766498ef7a5%26code_challenge%3D7VwT2FZLyz0rJZj7k5oY1o1voVEo9eQaaVmfjNzodVQ%26code_challenge_method%3DS256%26response_mode%3Dquery) account (with SDE enabled) and request for data sheet and the following application notes. AN3467 Crystals and Oscillators for Next Generation Timing Solutions ZLAN-517 ZL3070X\_60X\_61X\_174 Power Supply Decoupling and Layout Guidelines ZLAN-527 Assembly and PCB Layout Guidelines for Dual Row aQFN100 Package ZLAN-600 ZL3060x ZL3061x ZL3070x ZL30174 cycle-to-cycle jitter