| Integrated Circuits (ICs) | 2 | Obsolete | |
| Linear | 6 | Active | The SY88903AL, burst mode, high-sensitivity limiting post amplifier is designed for use in fiber-optic receivers, specially optimized for passive optical networks (PONs). The device connects to typical transimpedance amplifiers (TIAs). The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88903AL quantizes these signals and outputs PECL level waveforms.
The SY88903AL operates from a single +3.3V power supply, over temperatures ranging from -40°C to +85°C. Signals with data rates from 622Mbps up to 1.25Gbps, and as small as 5mVPP, can be amplified to drive devices with PECL inputs.
The SY88903AL generates a Loss-of-Signal (LOS) open-collector TTL output. A programmable Loss-of-Signal level set pin (LOS LVL) sets the sensitivity of the input amplitude detection. LOS asserts high if the input amplitude falls below the threshold set by LOS LVL and de-asserts low otherwise. The enable bar input (/EN) de-asserts the true output signal without removing the input signal. The LOS output can be fed back to the /EN input to maintain output stability under a loss-of-signal condition. Typically, 3.4dB LOS hysteresis is provided to prevent chattering. |
| Power Management (PMIC) | 2 | Unknown | |
| Laser Drivers | 1 | Obsolete | |
| Integrated Circuits (ICs) | 2 | Active | The SY88922 is a high-speed current switch for driving a semiconductor laser diode in optical transmission applications. The output current, or modulation current IMOD, is DC current controlled by IRSET, current through the resistor RSET. The output OUT is HIGH when output enable is HIGH.
The device incorporates complementary open collector outputs with a capability of driving peak current of 25mA.
The resistor REXT must be placed between /OUT and VCC to dissipate the worst case power. RSER is recommended to compensate for laser diode matching issues.
The SY88922 utilizes the high performance bipolar ASSET™ technology. |
| Integrated Circuits (ICs) | 4 | Active | The SY88923AV limiting post amplifier with its high gain and wide bandwidth is ideal for use as a post amplifier in fiber-optic receivers with data rates up to 3.2Gbps. Signals as small as 5mVp-p can be amplified to drive devices with PECL inputs. The SY88923AV generates a chatter-free Loss-of-Signal (LOS) open collector TTL output.
The SY88923AV incorporates a programmable level detect function to identify when the input signal has been lost. The LOS output will change from logic "LOW" to logic "HIGH" when input signal is smaller than the swing set by LOSLVL. This information can be fed back to the EN input of the device to maintain stability under loss-of-signal condition. Using LOSLVL pin, the sensitivity of the level detection can be adjusted. The LOSLVL voltage can be set by connecting a resistor divider between VCC and VREF shown in Figure 3. "Typical Operating Characteristics" on page 6 show the relationship between input level sensitivity and the voltage set on LOSLVL.
The LOS output is a TTL open collector output that requires a pull-up resistor for proper operation, Figure 1. (see PDF file) |
| Drivers, Receivers, Transceivers | 3 | Active | The SY88927V is a 2.5Gb/s high-speed differential receiver. The device is functionally equivalent to the EL16V devices, with higher performance capabilities. With output transition times significantly faster than the EL16V, the SY88927V is ideally suited for interfacing with high-frequency sources.
The SY88927V provides a VBB output for either single-ended use or as a DC bias for AC coupling to the device. The VBB pin should be used only as a bias for the SY88927V as its current sink/source capability is limited. Whenever used, the VBB pin should be bypassed to ground via a 0.01mF capacitor.
Under open input conditions (pulled to VEE), internal input clamps will force the Q output LOW. |
| Laser Drivers | 4 | Active | The SY88932L is the smallest available laser driver with a programmable modulation current up to 60mA for Fabry-Perot (FP) or distributed feedback (DFB) lasers. The device is suitable for SONET/SDH applications with data rates up to 4.25Gbps. The SY88932L accepts either CML level or AC-coupled PECL inputs, and incorporates an active low TTL /EN function which shuts off the modulation current when HIGH. |
| Special Purpose Amplifiers | 7 | Active | The SY88933AL high-sensitivity limiting post amplifier is designed for use in fiber-optic receivers. The device connects to typical transimpedance amplifiers (TIAs). The linear signal output from TIAs can contain significant amounts of noise and may vary in amplitude over time. The SY88933AL quantizes these signals and outputs PECL level waveforms.
The SY88933AL operates from a single +3.3V power supply, over temperatures ranging from -40°C to +8°C. With its wide bandwidth and high gain, signal with data rates up to 1.25Gbps and as small as 5mVPP can be amplified to drive devices with PECL inputs.
The SY88933AL generates a high gain signal-detect (SD) open-collector TTL output. The SD function has a high gain input stage for increased sensitivity. A programmable signal-detect level set pin (SDLVL) sets the sensitivity of the input amplitude detection. SD asserts high if the input amplitude rises above the threshold set by SDLVL and de-asserts low otherwise. The enable input (EN) de-asserts the true output signal without removing the input signal. The SD output can be fed back to the EN input to maintain output stability under a loss-of-signal condition. Typically, 3.4dB SD hysteresis is provided to prevent chattering. |
| Special Purpose | 3 | Active | The SY88943V limiting post amplifier with its high gain and wide bandwidth is ideal for use as a post amplifier in fiber-optic receivers with data rates up to 2.5Gbps. Signals as small as 5mVp-p can be amplified to drive devices with PECL inputs. The SY88943V generates a chatter-free Signal Detect (SD) open collector TTL output.
The SY88943V incorporates a programmable level detect function to identify when the input signal has been lost. This information can be fed back to the EN input of the device to maintain stability under loss of signal condition. Using SDLVL pin, the sensitivity of the level detection can be adjusted. The SDLVL voltage can be set by connecting a resistor divider between VCC and VREF. Figure 3 and Figure 4 show the relationship between input level sensitivity and the voltage set on SDLVL. Figure 5 shows the relationship between input level sensitivity and resistor divider ratio.
The SD output is a TTL open collector output that requires a pull-up resistor for proper operation |
