Microchip Technology

The PL360B is a programmable modem for narrow-band Power Line Communication (PLC), able to run any PLC protocol in the frequency band below 500 kHz. This device has been designed to comply with FCC, ARIB, KN60 and CENELEC EN50065 regulations matching requirements of Internet of Things and Smart Energy applications. It supports state-of-the-art narrow-band PLC standards such as ITU G.9903 (G3-PLC®), ITU G.9904 (PRIME) as well as any other narrowband PLC protocols, being at the same time a future-proof platform able to support the evolution of these standards. The PL360B has been conceived to be driven by external Microchip host devices, thus providing an additional level of flexibility on the host side. The Microchip host device loads the proper PLC-protocol firmware before modem operation and controls the PL360 modem.

The PL500-15/16 is a low cost, high performance and low phase noise VCXO for the 1MHz to 18MHz range, providing less than -130dBc at 10kHz offset when using a 35.328MHz crystal.The very low jitter (2.5 ps RMS period jitter) makes this chip ideal for applications requiring voltage controlled frequency sources. Input crystal can range from 16MHz to 36MHz (fundamental resonant mode).

The Analog Frequency Multiplier (AFM) is the industry’s first ‘Balanced Oscillator’ utilizing analog multiplication of the fundamental frequency (at double or quadruple frequency), combined with an attenuation of the fundamental of the reference crystal, without the use of a phase-locked loop (PLL), in CMOS technology.PL560/5-xx products can achieve up to 800MHz output frequency with little jitter or phase noise deterioration. In addition, the low frequency input crystal requirement makes the AFMs the most affordable high-performance timing-source in the market.PL560/5-xx family of products utilize low-power CMOS technology and are housed in Green/RoHS compliant 16-pin TSSOP, and 16-pin 3x3 QFN packages.

The Analog Frequency Multiplier (AFM) is the industry’s first ‘Balanced Oscillator’ utilizing analog multiplication of the fundamental frequency (at double or quadruple frequency), combined with an attenuation of the fundamental of the reference crystal, without the use of a phase-locked loop (PLL), in CMOS technology.PL565-37/38 products can achieve up to 250MHz output frequency with little jitter or phase noise deterioration. In addition, the low frequency input crystal requirement makes the AFMs the most affordable high-performance timing-source in the market.