Analog Devices

The ADN2871 laser diode driver (LDD) is designed for advanced SFP and SFF modules, using SFF-8472 digital diagnostics. The ADN2871 supports operation from 50 Mbps up to 4.25 Gbps.Average power and extinction ratios can be set with a voltage provided by a microcontroller DAC or by a trimmable resistor or digital potentiometer. The average power control loop is implemented using feedback from a monitor photodiode. The device provides bias and modulation current monitoring, as well as fail alarms and automatic laser shutdown (ALS). The device interfaces easily with the Analog Devices, Inc., ADuC7019 and ADuC7020 family of MicroConverter®devices and with the ADN2890, ADN2891, and ADN2892 family of limiting amplifiers to make a complete SFP/SFF transceiver solution. An SFP reference design is available.The product is pin-compatible with the ADN2870 dual-loop LDD, allowing the same design to work with either device. For dual-loop control applications, refer to the ADN2870 data sheet. The product is available in a space-saving 4 mm × 4 mm LFCSP specified over the −40°C to +85°C temperature range.Applications1×/2×/4× Fibre Channel SFP/SFF modulesMultirate OC3 to OC48-FEC SFP/SFF modulesLX-4 modulesDWDM/CWDM SFP modules1GE SFP/SFF transceiver modulesVCSEL, DFB, and FP transmitters

The ADN2892 is a 4.25 Gbps limiting amplifier with integrated loss of signal (LOS) detection circuitry and a received signal strength indicator (RSSI). This part is optimized for Fibre Channel (FC) and Gigabit Ethernet (GbE) optoelectronic conversion applications. The ADN2892 has a differential input sensitivity of 3.5 mV p-p and accepts up to a 2.0 V p-p differential input overload voltage. The ADN2892 has current mode logic (CML) outputs with controlled rise and fall times.The ADN2892 has a selectable low-pass filter with a −3 dB cutoff frequency of 1.5 GHz. By setting BW_SEL to Logic 0, the filter can limit the relaxation oscillation of a low cost CD laser used in a legacy 1 Gbps FC transmitter. The limited BW also reduces the rms noise and in turn improves the receiver optical sensitivity for a lower data rate application, such as 1× FC and GbE.By monitoring the bias current through a photodiode, the onchip RSSI detector measures the average power received with 2% typical linearity over the entire valid input range of the photodiode. The on-chip RSSI detector facilitates SFF-8472-compliant optical transceivers by eliminating the need for external RSSI detector circuitry.Additional features include a programmable loss-of-signal (LOS) detector and output squelch. The ADN2892 is available in a 3 mm × 3 mm, 16-lead LFCSP.Applications1×, 2×, and 4× FC transceiversSFP/SFF/GBIC optical transceiversGbE transceiversBackplane receivers

The ADN2913 provides the receiver functions of quantization, signal level detection, and clock and data recovery for continuous data rates from 6.5 Mbps to 8.5 Gbps. The ADN2913 automatically locks to all data rates without the need for an external reference clock or programming. ADN2913 jitter performance exceeds all jitter specifications required by SONET/SDH, including jitter transfer, jitter generation, and jitter tolerance.The ADN2913 provides manual or automatic slice adjust and manual sample phase adjusts. Additionally, the user can select a limiting amplifier, equalizer, or 0 dB EQ at the input. The equalizer is adaptive or it can be manually set.The receiver front-end loss of signal (LOS) detector circuit indicates when the input signal level falls below a user-programmable threshold. The LOS detection circuit has hysteresis to prevent chatter at the LOS output. In addition, the input signal strength can be read through the I2C registers.The ADN2913 also supports pseudorandom binary sequence (PRBS) generation, bit error detection, and input data rate readback features.The ADN2913 is available in a compact 4 mm × 4 mm, 24-lead lead frame chip scale package (LFCSP). All ADN2913 specifications are defined over the ambient temperature range of −40°C to +85°C, unless otherwise noted.ApplicationsSONET/SDH OC-1/OC-3/OC-12/OC-48 and all associated FEC rates1GE, 1GFC, 2GFC, 4GFC, 8GFC, CPRI OS/L.6 up to OS/L.60Any rate regenerators/repeaters

The ADN2915 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 6.5 Mbps to 11.3 Gbps. The ADN2915 automatically locks to all data rates without the need for an external reference clock or programming. ADN2915 jitter performance exceeds all jitter specifications required by SONET/SDH, including jitter transfer, jitter generation, and jitter tolerance.The ADN2915 provides manual or automatic slice adjust and manual sample phase adjusts. Additionally, the user can select a limiting amplifier, equalizer, or bypass at the input. The equalizer is either adaptive or can be manually set.The receiver front-end loss of signal (LOS) detector circuit indicates when the input signal level has fallen below a user-programmable threshold. The LOS detect circuit has hysteresis to prevent chatter at the LOS output. In addition, the input signal strength can be read through the I2C registers.The ADN2915 also supports pseudorandom binary sequence (PRBS) generation, bit error detection, and input data rate readback features.The ADN2915 is available in a compact 4 mm × 4 mm, 24-lead chip scale package (LFCSP). All ADN2915 specifications are defined over the ambient temperature range of −40°C to +85°C, unless otherwise noted.ApplicationsSONET/SDH OC-1/OC-3/OC-12/OC-48/OC-192 and allassociated FEC rates1GFC, 2GFC, 4GFC, 8GFC, 10GFC, 1GE, and 10GEWDM transpondersAny rate regenerators/repeaters

The ADN2917 provides the receiver functions of quantization, signal level detect, and clock and data recovery for continuous data rates from 8.5 Gbps to 11.3 Gbps. The ADN2917 automatically locks to all data rates without the need for an external reference clock or programming. ADN2917 jitter performance exceeds all jitter specifications required by SONET/SDH, including jitter transfer, jitter generation, and jitter tolerance.The ADN2917 provides manual or automatic slice adjust and manual sample phase adjusts. Additionally, the user can select a limiting amplifier or equalizer at the input. The equalizer is either adaptive or can be manually set.The receiver front-end loss of signal (LOS) detector circuit indicates when the input signal level has fallen below a user-programmable threshold. The LOS detect circuit has hysteresis to prevent chatter at the LOS output. In addition, the input signal strength can be read through the I2C registers.The ADN2917 also supports pseudorandom binary sequence (PRBS) generation, bit error detection, and input data rate readback features.The ADN2917 is available in a compact 4 mm × 4 mm, 24-lead frame chip scale package (LFCSP). All ADN2917 specifications are defined over the ambient temperature range of −40°C to +85°C, unless otherwise noted.ApplicationsSONET/SDH OC-192, 10GFC, and 10GE and all associated FECsXFP, line cards, clocks, routers, repeaters, instrumentsAny rate regenerators/repeaters