| Power Management (PMIC) | 3 | Active | |
MAX38650Tiny 1.8V to 5.5V Input, 390nA IQ, 100mA nanoPower Buck Converter with 100% Duty Cycle Operation | Voltage Regulators - DC DC Switching Regulators | 2 | Active | The MAX38650 is a nanoPower, ultra-low 390nA quiescent current, buck (step-down) DC-DC converter operating from 1.8V to 5.5V input voltage and supporting load currents of up to 100mA with peak efficiencies of 95%. While in shutdown, there is only 5nA of shutdown current. The device offers ultra-low quiescent current, small total solution size, and high efficiency throughout the load range. The device is ideal for battery applications where long battery life is a must. The MAX38650 supports 100% duty cycle operation allowing seamless transition as battery discharges and falls below the target output voltage. The MAX38650 utilizes a unique control scheme that allows ultra-low quiescent current and high efficiency over a wide output current range. The device is offered in a space-saving, 1.58mm x 0.89mm, 6-pin wafer-level package (WLP) (2 x 3 bumps, 0.4mm pitch). The part is specified over the -40°C to +125°C operating temperature range.ApplicationsLow-Voltage Industrial ApplicationsPortable Space-Constrained Consumer ProductsSingle Li-ion and Coin Cell Battery ProductsWearable Devices, Ultra-Low-Power IoT, NB IoT, and Bluetooth Low Energy (BLE)Wired, Wireless, Industrial Products |
| Voltage Regulators - DC DC Switching Regulators | 2 | Active | |
| Laser Drivers | 1 | Obsolete | |
| Power Management (PMIC) | 6 | Active | |
| Development Boards, Kits, Programmers | 2 | Obsolete | |
MAX3872Multirate Clock and Data Recovery with Limiting Amplifier | Application Specific Clock/Timing | 3 | Active | The MAX3872 is a compact, multirate clock and data recovery with limiting amplifier for OC-3, OC-12, OC-24, OC-48, OC-48 with FEC SONET/SDH and Gigabit Ethernet (1.25Gbps/2.5Gbps) applications. Without using an external reference clock, the fully integrated phase-locked loop (PLL) recovers a synchronous clock signal from the serial NRZ data input. The input data is then retimed by the recovered clock, providing a clean data output. An additional serial input (SLBI±) is available for system loopback diagnostic testing. Alternatively, this input can be connected to a reference clock to maintain a valid clock output in the absence of data transitions. The device also includes a loss-of-lock (active-low LOL) output.The MAX3872 contains a vertical threshold control to compensate for optical noise due to EDFAs in DWDM transmission systems. The recovered data and clock outputs are CML with on-chip 50Ω back termination on each line. Its jitter performance exceeds all SONET/SDH specifications.The MAX3872 operates from a single +3.3V supply and typically consumes 580mW. It is available in a 5mm x 5mm 32-pin thin QFN with exposed-pad package and operates over a -40°C to +85°C temperature range.ApplicationsAccess NetworksAdd/Drop MultiplexersDigital Cross-ConnectsDWDM Transmission SystemsSONET/SDH Receivers and RegeneratorsSONET/SDH Test Equipment |
| Integrated Circuits (ICs) | 1 | Active | |
| Application Specific Clock/Timing | 1 | Active | |
| Integrated Circuits (ICs) | 2 | Obsolete | |
