Catalog
4T2R Direct RF Transmitter and Observation Receiver
Key Features
• Flexible reconfigurable radio common platform designTransmit/receive channel bandwidth up to 1.2 GHz/2.4 GHz (4T2R)RFDAC/RFADC RF frequency range up to 7.5 GHzOn-chip PLL with multichip synchronizationExternal RFCLK input option
• Transmit/receive channel bandwidth up to 1.2 GHz/2.4 GHz (4T2R)
• RFDAC/RFADC RF frequency range up to 7.5 GHz
• On-chip PLL with multichip synchronizationExternal RFCLK input option
• External RFCLK input option
• Versatile digital featuresConfigurable digital up/down conversion (DDC and DUC)8 fine complex DUCs and 4 coarse complex DUCs8 fine complex DDCs and 4 coarse complex DDCs, 2 independent48-bit NCO per DUC/DDCProgrammable 192-tap PFIR filter for receive equalizationSupports 4 different profile settings loaded via GPIOReceive AGC supportFast detect with low latency for fast AGC controlSignal monitor for slow AGC controlDedicated AGC support pinsTransmit DPD supportProgrammable delay and gain per transmit data pathCoarse DDC delay adjust for DPD observation path
• Configurable digital up/down conversion (DDC and DUC)8 fine complex DUCs and 4 coarse complex DUCs8 fine complex DDCs and 4 coarse complex DDCs, 2 independent48-bit NCO per DUC/DDC
• 8 fine complex DUCs and 4 coarse complex DUCs
• 8 fine complex DDCs and 4 coarse complex DDCs, 2 independent
• 48-bit NCO per DUC/DDC
• Programmable 192-tap PFIR filter for receive equalizationSupports 4 different profile settings loaded via GPIO
• Supports 4 different profile settings loaded via GPIO
• Receive AGC supportFast detect with low latency for fast AGC controlSignal monitor for slow AGC controlDedicated AGC support pins
• Fast detect with low latency for fast AGC control
• Signal monitor for slow AGC control
• Dedicated AGC support pins
• Transmit DPD supportProgrammable delay and gain per transmit data pathCoarse DDC delay adjust for DPD observation path
• Programmable delay and gain per transmit data path
• Coarse DDC delay adjust for DPD observation path
• Auxiliary featuresPower amplifier downstream protection circuitryOn-chip temperature monitoring unitProgrammable GPIO pins supporting different user configurationsADC clock driver with selectable divide ratiosTDD power savings option and sharing ADCs
• Power amplifier downstream protection circuitry
• On-chip temperature monitoring unit
• Programmable GPIO pins supporting different user configurations
• ADC clock driver with selectable divide ratios
• TDD power savings option and sharing ADCs
• SERDES JESD204B/JESD204C interface, 16 lanes up to 24.75 Gbps8 lanes per each DAC and ADCJESD204B compatible with maximum 15.5 Gbps lane rateJESD204C compatible with maximum 24.75 Gbps lane rateSupports real or complex digital data (8-bit, 12-bit, 16-bit, or 24-bit)
• 8 lanes per each DAC and ADC
• JESD204B compatible with maximum 15.5 Gbps lane rate
• JESD204C compatible with maximum 24.75 Gbps lane rate
• Supports real or complex digital data (8-bit, 12-bit, 16-bit, or 24-bit)
• 15 mm × 15 mm, 324-ball BGA with 0.8 mm pitch
Description
AI
The AD9986 is a highly integrated device with a 16-bit, 12 GSPS maximum sample rate RF DAC core, and a 12-bit, 6 GSPS rate RF ADC core. The AD9986 supports four transmitter channels and two receiver channels with four transmitter, two receiver (4T2R) configuration. The AD9986 is well suited for 2-antenna and 4-antenna transmitter applications requiring a wide bandwidth observation receiver path for the digital predistortion. The AD9986 supports up to a 6 GSPS complex transmit and receive data rate in single channel mode. The maximum radio channel bandwidth supported is 1.2 GHz and 2.4 GHz for the transmit and receive paths, respectively (4T2R). The AD9986 features a 16 lane, 24.75 Gbps JESD204C or 15.5 Gbps JESD204B serial data port, an on-chip clock multiplier, and digital signal processing capability targeted at multiband, direct-to-RF radio applications.APPLICATIONSWireless communications infrastructureW-CDMA, LTE, LTE-A, Massive-MIMOMicrowave point-to-point, E-band, and 5G mm WaveBroadband communications systemsDOCSIS 3.1 and 4.0 CMTSCommunications test and measurement system
