CD4023B Series

Three-channel 3-input 3V-to-18V NAND gate

Catalog

Three-channel 3-input 3V-to-18V NAND gate

Part	Number of Circuits	Max Propagation Delay @ V, Max CL	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Current - Quiescent (Max) [Max]	Number of Inputs	Package / Case [x]	Package / Case [y]	Package / Case	Operating Temperature [Min]	Operating Temperature [Max]	Logic Type	Input Logic Level - High [Max]	Input Logic Level - High [Min]	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Input Logic Level - Low [Min]	Input Logic Level - Low [Max]	Supplier Device Package	Package / Case [custom]	Package / Case [custom]
Texas Instruments CD4023BMT	3	90 ns	3.4 mA	3.4 mA	1 çA	3	0.154 in	3.9 mm	14-SOIC	-55 °C	125 °C	NAND Gate	11 V	3.5 V	Surface Mount	18 V	3 V	1.5 V	4 V
Texas Instruments CD4023BNSR	3	90 ns	3.4 mA	3.4 mA	1 çA	3	0.209 "	5.3 mm	14-SOIC	-55 °C	125 °C	NAND Gate	11 V	3.5 V	Surface Mount	18 V	3 V	1.5 V	4 V	14-SO
Texas Instruments CD4023BM	3	90 ns	3.4 mA	3.4 mA	1 çA	3	0.154 in	3.9 mm	14-SOIC	-55 °C	125 °C	NAND Gate	11 V	3.5 V	Surface Mount	18 V	3 V	1.5 V	4 V
Texas Instruments CD4023BE	3	90 ns	3.4 mA	3.4 mA	1 çA	3	0.3 "	7.62 mm	14-DIP	-55 °C	125 °C	NAND Gate	11 V	3.5 V	Through Hole	18 V	3 V	1.5 V	4 V
Texas Instruments CD4023BPW	3	90 ns	3.4 mA	3.4 mA	1 çA	3			14-TSSOP	-55 °C	125 °C	NAND Gate	11 V	3.5 V	Surface Mount	18 V	3 V	1.5 V	4 V	14-TSSOP	0.173 "	4.4 mm
Texas Instruments CD4023BPWR	3	90 ns	3.4 mA	3.4 mA	1 çA	3			14-TSSOP	-55 °C	125 °C	NAND Gate	11 V	3.5 V	Surface Mount	18 V	3 V	1.5 V	4 V	14-TSSOP	0.173 "	4.4 mm
Texas Instruments CD4023BMTE4	3	90 ns	3.4 mA	3.4 mA	1 çA	3	0.154 in	3.9 mm	14-SOIC	-55 °C	125 °C	NAND Gate	11 V	3.5 V	Surface Mount	18 V	3 V	1.5 V	4 V

Catalog

Three-channel 3-input 3V-to-18V NAND gate

Key Features

• Propagation delay time = 60 ns (typ.) at CL= 50 pF, VDD= 10 VBuffered inputs and outputsStandardized symmetrical output characteristicsMaximum input current of 1 µA at 18 V over-full package temperature range; 100 nA at 18 V and 25°C100% tested for quiescent current at 20 V5-V, 10-V, and 15-V parametric ratingsNoise margin (over full package temperature range:1 V at VDD= 5 V2 V at VDD= 10 V2.5 at VDD= 15 VMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of "B" Series CMOS Devices"Quad 2 Input—CD4011BDual 4 Input—CD4012BTriple 3 Input—CD4023BData sheet acquired from Harris Semiconductor.Propagation delay time = 60 ns (typ.) at CL= 50 pF, VDD= 10 VBuffered inputs and outputsStandardized symmetrical output characteristicsMaximum input current of 1 µA at 18 V over-full package temperature range; 100 nA at 18 V and 25°C100% tested for quiescent current at 20 V5-V, 10-V, and 15-V parametric ratingsNoise margin (over full package temperature range:1 V at VDD= 5 V2 V at VDD= 10 V2.5 at VDD= 15 VMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of "B" Series CMOS Devices"Quad 2 Input—CD4011BDual 4 Input—CD4012BTriple 3 Input—CD4023BData sheet acquired from Harris Semiconductor.

Description

CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PWR suffix). The CD4011B and CD4023B types also are supplied in 14-lead thin shrink small-outline packages (PW suffix). CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered. The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PWR suffix). The CD4011B and CD4023B types also are supplied in 14-lead thin shrink small-outline packages (PW suffix).