CD4013B Series

CMOS Dual D-Type Flip Flop

Catalog

CMOS Dual D-Type Flip Flop

Part	Voltage - Supply [Max]	Voltage - Supply [Min]	Operating Temperature [Max]	Operating Temperature [Min]	Clock Frequency	Number of Elements	Function	Trigger Type	Type	Max Propagation Delay @ V, Max CL	Number of Bits per Element	Input Capacitance	Package / Case [custom]	Package / Case [custom]	Package / Case	Supplier Device Package	Mounting Type	Current - Quiescent (Iq)	Output Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Package / Case [x]	Package / Case [y]
Texas Instruments CD4013BPWRG4	18 V	3 V	125 °C	-55 °C	24 MHz	2	Reset Set(Preset)	Positive Edge	D-Type	90 ns	1	5 pF	0.173 "	4.4 mm	14-TSSOP	14-TSSOP	Surface Mount	4 çA	Complementary	6.8 mA	6.8 mA
Texas Instruments CD4013BM96E4	18 V	3 V	125 °C	-55 °C	24 MHz	2	Reset Set(Preset)	Positive Edge	D-Type	90 ns	1	5 pF			14-SOIC		Surface Mount	4 çA	Complementary	6.8 mA	6.8 mA	0.154 in	3.9 mm
Texas Instruments CD4013BMG4	18 V	3 V	125 °C	-55 °C	24 MHz	2	Reset Set(Preset)	Positive Edge	D-Type	90 ns	1	5 pF			14-SOIC		Surface Mount	4 çA	Complementary	6.8 mA	6.8 mA	0.154 in	3.9 mm
Texas Instruments CD4013BM96G4	18 V	3 V	125 °C	-55 °C	24 MHz	2	Reset Set(Preset)	Positive Edge	D-Type	90 ns	1	5 pF			14-SOIC		Surface Mount	4 çA	Complementary	6.8 mA	6.8 mA	0.154 in	3.9 mm
Texas Instruments CD4013BE	18 V	3 V	125 °C	-55 °C	24 MHz	2	Reset Set(Preset)	Positive Edge	D-Type	90 ns	1	5 pF			14-DIP		Through Hole	4 çA	Complementary	6.8 mA	6.8 mA	0.3 "	7.62 mm
Texas Instruments CD4013BM96	18 V	3 V	125 °C	-55 °C	24 MHz	2	Reset Set(Preset)	Positive Edge	D-Type	90 ns	1	5 pF			14-SOIC		Surface Mount	4 çA	Complementary	6.8 mA	6.8 mA	0.154 in	3.9 mm
Texas Instruments CD4013BEE4	18 V	3 V	125 °C	-55 °C	24 MHz	2	Reset Set(Preset)	Positive Edge	D-Type	90 ns	1	5 pF			14-DIP		Through Hole	4 çA	Complementary	6.8 mA	6.8 mA	0.3 "	7.62 mm
Texas Instruments CD4013BNSR	18 V	3 V	125 °C	-55 °C	24 MHz	2	Reset Set(Preset)	Positive Edge	D-Type	90 ns	1	5 pF			14-SOIC	14-SO	Surface Mount	4 çA	Complementary	6.8 mA	6.8 mA	0.209 "	5.3 mm
Texas Instruments CD4013BME4	18 V	3 V	125 °C	-55 °C	24 MHz	2	Reset Set(Preset)	Positive Edge	D-Type	90 ns	1	5 pF			14-SOIC		Surface Mount	4 çA	Complementary	6.8 mA	6.8 mA	0.154 in	3.9 mm
Texas Instruments CD4013BPWR	18 V	3 V	125 °C	-55 °C	24 MHz	2	Reset Set(Preset)	Positive Edge	D-Type	90 ns	1	5 pF	0.173 "	4.4 mm	14-TSSOP	14-TSSOP	Surface Mount	4 çA	Complementary	6.8 mA	6.8 mA

Catalog

CMOS Dual D-Type Flip Flop

Key Features

• Asynchronous Set-Reset CapabilityStatic Flip-Flop OperationMedium-Speed Operation: 16 MHz (Typical) Clock Toggle Rate at 10-V SupplyStandardized Symmetrical Output CharacteristicsMaximum Input Current Of 1-µA at 18 V Over Full Package Temperature Range:100 nA at 18 V and 25°CNoise Margin (Over Full Package Temperature Range):1 V at VDD= 5 V2 V at VDD= 10 V2.5 V at VDD= 15 VAsynchronous Set-Reset CapabilityStatic Flip-Flop OperationMedium-Speed Operation: 16 MHz (Typical) Clock Toggle Rate at 10-V SupplyStandardized Symmetrical Output CharacteristicsMaximum Input Current Of 1-µA at 18 V Over Full Package Temperature Range:100 nA at 18 V and 25°CNoise Margin (Over Full Package Temperature Range):1 V at VDD= 5 V2 V at VDD= 10 V2.5 V at VDD= 15 V

Description

The CD4013B device consists of two identical, independent data-type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q andQoutputs. These devices can be used for shift register applications, and, by connectingQoutput to the data input, for counter and toggle applications. The logic level present at the D input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line, respectively. The CD4013B types are supplied in 14-pin dual-in-line plastic packages (E suffix), 14-pin small-outline packages (M, MT, M96, and NSR suffixes), and 14-pin thin shrink small-outline packages (PW and PWR suffixes). The CD4013B device consists of two identical, independent data-type flip-flops. Each flip-flop has independent data, set, reset, and clock inputs and Q andQoutputs. These devices can be used for shift register applications, and, by connectingQoutput to the data input, for counter and toggle applications. The logic level present at the D input is transferred to the Q output during the positive-going transition of the clock pulse. Setting or resetting is independent of the clock and is accomplished by a high level on the set or reset line, respectively. The CD4013B types are supplied in 14-pin dual-in-line plastic packages (E suffix), 14-pin small-outline packages (M, MT, M96, and NSR suffixes), and 14-pin thin shrink small-outline packages (PW and PWR suffixes).