ADP320 Series

Triple, 200 mA, Low Noise, High PSRR Voltage Regulator

Catalog

Triple, 200 mA, Low Noise, High PSRR Voltage Regulator

Part	Current - Output	Current - Output	Current - Output	Number of Regulators	Voltage - Output (Min/Fixed)	Supplier Device Package	Output Type	Mounting Type	Output Configuration	Operating Temperature [Max]	Operating Temperature [Min]	Voltage Dropout (Max) [Max]	Protection Features	Voltage - Input (Max) [Max]	Current - Supply (Max) [Max]	Control Features	Current - Quiescent (Iq)	Package / Case	Voltage Dropout (Max)
Analog Devices ADP320ACPZ331815R7	200 mA	200 mA	200 mA	3	1.5 V 1.8 V 3.3 V	16-LFCSP-WQ (3x3)	1.81 mOhm	Surface Mount	Positive	125 °C	-40 °C	0.17 V	Over Current Over Temperature Under Voltage Lockout (UVLO)	5.5 V	380 µA	Enable	160 µA	16-WFQFN Exposed Pad CSP
Analog Devices ADP320ACPZ-110-R7	200 mA	200 mA	200 mA	3	1.5 V 3.3 V	16-LFCSP-WQ (3x3)	1.81 mOhm	Surface Mount	Positive	125 °C	-40 °C	0.17 V	Over Current Over Temperature Under Voltage Lockout (UVLO)	5.5 V	380 µA	Enable	160 µA	16-WFQFN Exposed Pad CSP	-

Catalog

Triple, 200 mA, Low Noise, High PSRR Voltage Regulator

Key Features

• Bias voltage range (VBIAS): 2.5 V to 5.5 V

• LDO input voltage range (VIN1/VIN2, VIN3): 1.8 V to 5.5 V

• Three 200 mA low dropout voltage regulators

• 16-lead, 3 mm × 3 mm LFCSP

• Initial accuracy: ±1%

• Stable with 1 µF ceramic output capacitors

• No noise bypass capacitor required

• 3 independent logic controlled enables

• Over current and thermal protection

• High PSRR76 dB PSRR up to 1 kHz70 dB PSRR 10 kHz60 dB PSRR at 100 kHz40 dB PSRR at 1 MHz

• 76 dB PSRR up to 1 kHz

• 70 dB PSRR 10 kHz

• 60 dB PSRR at 100 kHz

• 40 dB PSRR at 1 MHz

• Low output noise24 µV rms typical output noise at VOUT = 1.2 V43 µV rms typical output noise at VOUT = 2.8 V

• 24 µV rms typical output noise at VOUT = 1.2 V

• 43 µV rms typical output noise at VOUT = 2.8 V

• Excellent transient response

• Low dropout voltage: 110 mV @ 200 mA load

• 85 µA typical ground current at no load, all LDOs enabled

• 100 µs fast turn-on circuit

• Guaranteed 200 mA output current per regulator

• −40°C to +125°C junction temperature

Description

The ADP320 200 mA triple output LDO combines high PSRR, low noise, low quiescent current, and low dropout voltage in a voltage regulator ideally suited for wireless applications with demanding performance and board space requirements.The low quiescent current, low dropout voltage, and wide input voltage range of the ADP320 triple LDO extend the battery life of portable devices. The ADP320 triple LDO maintains power supply rejection greater than 60 dB for frequencies as high as 100 kHz while operating with a low headroom voltage. The ADP320 triple LDO offers much lower noise performance than competing LDOs without the need for a noise bypass capacitor.The ADP320 triple LDO is available in a miniature 16-lead 3 mm × 3 mm LFCSP package and is stable with tiny 1 µF ±30% ceramic output capacitors, resulting in the smallest possible board area for a wide variety of portable power needs.The ADP320 triple LDO is available in output voltage combinations ranging from 0.8 V to 3.3 V and offers over current and thermal protection to prevent damage in adverse conditions.ApplicationsMobile phonesDigital cameras and audio devicesPortable and battery-powered equipmentPortable medical devicesPost dc-to-dc regulation