ADS54J42 Series
Dual-Channel, 14-Bit, 625-MSPS Analog-to-Digital Converter (ADC)
Manufacturer: Texas Instruments
Catalog
Dual-Channel, 14-Bit, 625-MSPS Analog-to-Digital Converter (ADC)
Key Features
• 14-Bit Resolution, Dual-Chanel, 625-MSPS ADCNoise Floor: –157 dBFS/HzSpectral Performance (fIN= 170 MHz at –1 dBFS):SNR: 71.0 dBFSNSD: –155.9 dBFS/HzSFDR: 85 dBcSFDR: 93 dBc (Except HD2, HD3, and Interleaving Tones)Spectral Performance (fIN= 350 MHz at –1 dBFS):SNR: 69 dBFSNSD: –153.9 dBFS/HzSFDR: 76 dBcSFDR: 90 dBc (Except HD2, HD3, and Interleaving Tones)Channel Isolation: 100 dBc at fIN= 170 MHzInput Full-Scale: 1.9 VPPInput Bandwidth (3 dB): 1.2 GHzOn-Chip DitherIntegrated Wideband DDC BlockJESD204B Interface with Subclass 1 Support:2 Lanes per ADC at 6.25 Gbps4 Lanes per ADC at 3.125 GbpsSupport for Multi-Chip SynchronizationPower Dissipation: 970 mW/Ch at 625 MSPSPackage: 72-Pin VQFNP (10 mm × 10 mm)14-Bit Resolution, Dual-Chanel, 625-MSPS ADCNoise Floor: –157 dBFS/HzSpectral Performance (fIN= 170 MHz at –1 dBFS):SNR: 71.0 dBFSNSD: –155.9 dBFS/HzSFDR: 85 dBcSFDR: 93 dBc (Except HD2, HD3, and Interleaving Tones)Spectral Performance (fIN= 350 MHz at –1 dBFS):SNR: 69 dBFSNSD: –153.9 dBFS/HzSFDR: 76 dBcSFDR: 90 dBc (Except HD2, HD3, and Interleaving Tones)Channel Isolation: 100 dBc at fIN= 170 MHzInput Full-Scale: 1.9 VPPInput Bandwidth (3 dB): 1.2 GHzOn-Chip DitherIntegrated Wideband DDC BlockJESD204B Interface with Subclass 1 Support:2 Lanes per ADC at 6.25 Gbps4 Lanes per ADC at 3.125 GbpsSupport for Multi-Chip SynchronizationPower Dissipation: 970 mW/Ch at 625 MSPSPackage: 72-Pin VQFNP (10 mm × 10 mm)
Description
AI
The ADS54J42 is a low-power, wide-bandwidth, 14-bit, 625-MSPS, dual-channel, analog-to-digital converter (ADC). Designed for high signal-to-noise ratio (SNR), the device delivers a noise floor of –157 dBFS/Hz for applications aiming for highest dynamic range over a wide instantaneous bandwidth. The device supports the JESD204B serial interface with data rates up to 6.25 Gbps. The buffered analog input provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy. Each ADC channel optionally can be connected to a wideband digital down-converter (DDC) block. The ADS54J42 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption.
The JESD204B interface reduces the number of interface lines, allowing high system integration density. An internal phase-locked loop (PLL) multiplies the ADC sampling clock to derive the bit clock that is used to serialize the 14-bit data from each channel.
The ADS54J42 is a low-power, wide-bandwidth, 14-bit, 625-MSPS, dual-channel, analog-to-digital converter (ADC). Designed for high signal-to-noise ratio (SNR), the device delivers a noise floor of –157 dBFS/Hz for applications aiming for highest dynamic range over a wide instantaneous bandwidth. The device supports the JESD204B serial interface with data rates up to 6.25 Gbps. The buffered analog input provides uniform input impedance across a wide frequency range and minimizes sample-and-hold glitch energy. Each ADC channel optionally can be connected to a wideband digital down-converter (DDC) block. The ADS54J42 provides excellent spurious-free dynamic range (SFDR) over a large input frequency range with very low power consumption.
The JESD204B interface reduces the number of interface lines, allowing high system integration density. An internal phase-locked loop (PLL) multiplies the ADC sampling clock to derive the bit clock that is used to serialize the 14-bit data from each channel.
