SN74LVCH244A Series

8-ch, 1.65-V to 3.6-V buffers with bus-hold and 3-state outputs

Catalog

8-ch, 1.65-V to 3.6-V buffers with bus-hold and 3-state outputs

Part	Number of Bits per Element	Supplier Device Package	Current - Output High, Low	Logic Type	Operating Temperature [Max]	Operating Temperature [Min]	Number of Elements	Package / Case [y]	Package / Case	Package / Case [x]	Mounting Type	Output Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Package / Case [y]	Package / Case [custom]	Package / Case [custom]	Package / Case	Package / Case
Texas Instruments SN74LVCH244APWRG4	4	20-TSSOP	24 mA	Buffer Non-Inverting	85 °C	-40 °C	2	4.4 mm	20-TSSOP	0.173 in	Surface Mount	3-State	1.65 V	3.6 V
Texas Instruments SN74LVCH244ADWR	4	20-SOIC	24 mA	Buffer Non-Inverting	85 °C	-40 °C	2	0.295 in	20-SOIC		Surface Mount	3-State	1.65 V	3.6 V	7.5 mm
Texas Instruments SN74LVCH244ADBQR	4	20-SSOP	24 mA	Buffer Non-Inverting	85 °C	-40 °C	2		20-SSOP		Surface Mount	3-State	1.65 V	3.6 V		0.154 in	3.9 mm
Texas Instruments SN74LVCH244APWT	4	20-TSSOP	24 mA	Buffer Non-Inverting	85 °C	-40 °C	2	4.4 mm	20-TSSOP	0.173 in	Surface Mount	3-State	1.65 V	3.6 V
Texas Instruments SN74LVCH244APWRE4	4	20-TSSOP	24 mA	Buffer Non-Inverting	85 °C	-40 °C	2	4.4 mm	20-TSSOP	0.173 in	Surface Mount	3-State	1.65 V	3.6 V
Texas Instruments SN74LVCH244ANS	4	20-SO	24 mA	Buffer Non-Inverting	85 °C	-40 °C	2		20-SOIC		Surface Mount	3-State	1.65 V	3.6 V				0.209 "	5.3 mm
Texas Instruments SN74LVCH244ANSR	4	20-SO	24 mA	Buffer Non-Inverting	85 °C	-40 °C	2		20-SOIC		Surface Mount	3-State	1.65 V	3.6 V				0.209 "	5.3 mm
Texas Instruments SN74LVCH244ARGYRG4	4	20-VQFN (3.5x4.5)	24 mA	Buffer Non-Inverting	85 °C	-40 °C	2		20-VFQFN Exposed Pad		Surface Mount	3-State	1.65 V	3.6 V
Texas Instruments SN74LVCH244ADW	4	20-SOIC	24 mA	Buffer Non-Inverting	85 °C	-40 °C	2	0.295 in	20-SOIC		Surface Mount	3-State	1.65 V	3.6 V	7.5 mm

Catalog

8-ch, 1.65-V to 3.6-V buffers with bus-hold and 3-state outputs

Key Features

• Operate From 1.65 V to 3.6 VInputs Accept Voltages to 5.5 VMax tpdof 5.9 ns at 3.3 VTypical VOLP(Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) >2 V at VCC= 3.3 V, TA= 25°CSupport Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)IoffSupports Partial-Power-Down Mode OperationBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Operate From 1.65 V to 3.6 VInputs Accept Voltages to 5.5 VMax tpdof 5.9 ns at 3.3 VTypical VOLP(Output Ground Bounce) <0.8 V at VCC= 3.3 V, TA= 25°CTypical VOHV(Output VOHUndershoot) >2 V at VCC= 3.3 V, TA= 25°CSupport Mixed-Mode Signal Operation on All Ports (5-V Input/Output Voltage With 3.3-V VCC)IoffSupports Partial-Power-Down Mode OperationBus Hold on Data Inputs Eliminates the Need for External Pullup/Pulldown ResistorsLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)

Description

The SN54LVCH244A octal buffer/line driver is designed for 2.7-V to 3.6-V VCCoperation, and the SN74LVCH244A octal buffer/line driver is designed for 1.65-V to 3.6-V VCCoperation. These devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. WhenOEis low, these devices pass data from the A inputs to the Y outputs. WhenOEis high, the outputs are in the high-impedance state. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. The SN54LVCH244A octal buffer/line driver is designed for 2.7-V to 3.6-V VCCoperation, and the SN74LVCH244A octal buffer/line driver is designed for 1.65-V to 3.6-V VCCoperation. These devices are organized as two 4-bit line drivers with separate output-enable (OE) inputs. WhenOEis low, these devices pass data from the A inputs to the Y outputs. WhenOEis high, the outputs are in the high-impedance state. Active bus-hold circuitry holds unused or undriven inputs at a valid logic state. Use of pullup or pulldown resistors with the bus-hold circuitry is not recommended. Inputs can be driven from either 3.3-V or 5-V devices. This feature allows the use of these devices as translators in a mixed 3.3-V/5-V system environment. These devices are fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the devices when they are powered down. To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.