CD40174B-MIL Series

CMOS Hex D-Type Flip-Flop

Catalog

CMOS Hex D-Type Flip-Flop

Part	Mounting Type	Number of Bits per Element	Input Capacitance	Max Propagation Delay @ V, Max CL	Package / Case	Package / Case	Package / Case	Voltage - Supply [Max]	Voltage - Supply [Min]	Output Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Trigger Type	Operating Temperature [Max]	Operating Temperature [Min]	Supplier Device Package	Type	Current - Quiescent (Iq)	Clock Frequency	Number of Elements	Package / Case [x]	Package / Case [y]	Function	Package / Case
Texas Instruments CD40174BNS	Surface Mount	6	5 pF	100 ns	0.209 "	16-SOIC	5.3 mm	18 V	3 V	Non-Inverted	6.8 mA	6.8 mA	Positive Edge	125 °C	-55 °C	16-SO	D-Type	4 çA	16 MHz	1
Texas Instruments CD40174BPWRG4	Surface Mount	6	5 pF	100 ns		16-TSSOP		18 V	3 V	Non-Inverted	6.8 mA	6.8 mA	Positive Edge	125 °C	-55 °C	16-TSSOP	D-Type	4 çA	16 MHz	1	0.173 in	4.4 mm
Texas Instruments CD40174BPWRE4	Surface Mount	6	5 pF	100 ns		16-TSSOP		18 V	3 V	Non-Inverted	6.8 mA	6.8 mA	Positive Edge	125 °C	-55 °C	16-TSSOP	D-Type	4 çA	16 MHz	1	0.173 in	4.4 mm
Texas Instruments CD40174BM	Surface Mount	6	5 pF	100 ns		16-SOIC		18 V	3 V	Non-Inverted	6.8 mA	6.8 mA	Positive Edge	125 °C	-55 °C	16-SOIC	D-Type	4 çA	16 MHz	1	0.154 in	3.9 mm
Texas Instruments CD40174BMT	Surface Mount	6	5 pF	100 ns		16-SOIC		18 V	3 V	Non-Inverted	6.8 mA	6.8 mA	Positive Edge	125 °C	-55 °C	16-SOIC	D-Type	4 çA	16 MHz	1	0.154 in	3.9 mm
Texas Instruments CD40174BEG4	Through Hole	6	5 pF	100 ns	0.3 in	16-DIP	7.62 mm	18 V	3 V	Non-Inverted	6.8 mA	6.8 mA	Positive Edge	125 °C	-55 °C	16-PDIP	D-Type	4 çA	16 MHz	1
Texas Instruments CD40174BPWR	Surface Mount	6	5 pF	100 ns		16-TSSOP		18 V	3 V	Non-Inverted	6.8 mA	6.8 mA	Positive Edge	125 °C	-55 °C	16-TSSOP	D-Type	4 çA	16 MHz	1	0.173 in	4.4 mm
Texas Instruments CD40174BM96	Surface Mount	6	5 pF	100 ns		16-SOIC		18 V	3 V	Non-Inverted	6.8 mA	6.8 mA	Positive Edge	125 °C	-55 °C	16-SOIC	D-Type	4 çA	16 MHz	1	0.154 in	3.9 mm
Texas Instruments CD40174BF3A	Through Hole	6	5 pF	100 ns		16-CDIP		18 V	3 V	Non-Inverted	6.8 mA	6.8 mA	Positive Edge	125 °C	-55 °C	16-CDIP	D-Type	20 çA	16 MHz	1			Standard	0.3 in 7.62 mm
Texas Instruments CD40174BPW	Surface Mount	6	5 pF	100 ns		16-TSSOP		18 V	3 V	Non-Inverted	6.8 mA	6.8 mA	Positive Edge	125 °C	-55 °C	16-TSSOP	D-Type	4 çA	16 MHz	1	0.173 in	4.4 mm

Catalog

CMOS Hex D-Type Flip-Flop

Key Features

• 5-V, 10-V, and 15-V parametric ratingsStandardized, symmetrical output characteristics100% tested for quiescent current at 20 VMaximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°CNoise margin (full package-temperature range) =1 V at VDD= 5 V2 V at VDD= 10 V2.5 V at VDD= 15 VMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"Applications:Shift RegistersBuffer/Storage RegistersPattern Generators5-V, 10-V, and 15-V parametric ratingsStandardized, symmetrical output characteristics100% tested for quiescent current at 20 VMaximum input current of 1 µA at 18 V over full package-temperature range; 100 nA at 18 V and 25°CNoise margin (full package-temperature range) =1 V at VDD= 5 V2 V at VDD= 10 V2.5 V at VDD= 15 VMeets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of ’B’ Series CMOS Devices"Applications:Shift RegistersBuffer/Storage RegistersPattern Generators

Description

Cd40174B consists of six identical ’D’-type flip-flops having independent DATA inputs. The CLOCK and CLEAR\ inputs are common to all six units. Data are transferred to the Q outputs on the positive-going transition of the clock pulse. All sic flip-flops are simultaneously reset by a low level on the CLEAR\ input. The CD40174B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes). Cd40174B consists of six identical ’D’-type flip-flops having independent DATA inputs. The CLOCK and CLEAR\ inputs are common to all six units. Data are transferred to the Q outputs on the positive-going transition of the clock pulse. All sic flip-flops are simultaneously reset by a low level on the CLEAR\ input. The CD40174B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).