AD4683 Series

Pseudo Differential Input, 1 MSPS/500 kSPS, Dual, Simultaneous Sampling, 16-Bit, SAR ADCs

Catalog

Pseudo Differential Input, 1 MSPS/500 kSPS, Dual, Simultaneous Sampling, 16-Bit, SAR ADCs

Part	Number of A/D Converters	Architecture	Ratio - S/H:ADC	Reference Type	Package / Case	Input Type	Voltage - Supply, Analog [Max]	Voltage - Supply, Analog [Min]	Configuration	Voltage - Supply, Digital [Min]	Voltage - Supply, Digital [Max]	Features	Supplier Device Package	Mounting Type	Sampling Rate (Per Second)	Data Interface	Operating Temperature [Max]	Operating Temperature [Min]	Number of Inputs	Number of Bits
Analog Devices AD4683BCPZ-RL7	2	SAR	0:2	External Internal	16-WFQFN Exposed Pad CSP	Pseudo-Differential	3.6 V	3 V	ADC	1.65 V	3.6 V	Simultaneous Sampling	16-LFCSP (3x3)	Surface Mount	500k	Serial	125 °C	-40 °C	2	16
Analog Devices AD4683BCPZ-RL	2	SAR	0:2	External Internal	16-WFQFN Exposed Pad CSP	Pseudo-Differential	3.6 V	3 V	ADC	1.65 V	3.6 V	Simultaneous Sampling	16-LFCSP (3x3)	Surface Mount	500k	Serial	125 °C	-40 °C	2	16

Catalog

Pseudo Differential Input, 1 MSPS/500 kSPS, Dual, Simultaneous Sampling, 16-Bit, SAR ADCs

Key Features

• Dual 16-bit ADC family

• Dual simultaneous sampling

• Pseudo differential analog inputs

• Throughput conversion rate

• 1 MSPS for the AD4682

• 500 kSPS for the AD4683

• SNR (typical)

• 87.5 dB, VREF= 3.3 V external

• 93.4 dB with RES = 1 and OSR = ×8

• On-chip oversampling function

• Alert function

• Resolution boost function

• INL error (maximum): 2.5 LSBs

• 2.5 V internal reference

• High speed serial interface

• −40°C to +125°C operation

• 3 mm × 3 mm, 16-lead LFCSP

Description

The AD4682 and the AD4683 are a 16-bit, pin-compatible family of dual, simultaneous sampling, high speed, low power, successive approximation register (SAR), analog-to-digital converters (ADCs) that operate from a 3.0 V to 3.6 V power supply and feature throughput rates up to 1 MSPS for the AD4682 and 500 kSPS for the AD4683. The analog input type is pseudo differential and is sampled and converted on the falling edge ofCS.Integrated on-chip oversampling blocks improve dynamic range and reduce noise at lower bandwidths. A buffered internal 2.5 V reference is included. Alternatively, an external reference up to 3.3 V can be used.The conversion process and data acquisition use standard control inputs that allow simple interfacing to microprocessors or digital signal processors (DSPs). The devices are compatible with 1.8 V, 2.5 V, and 3.3 V interfaces, using a separate logic supply.ApplicationsMotor control position feedbackMotor control current senseSonarPower qualityData acquisition systemsErbium doped fiber amplifier (EDFA) applicationsInphase (I) and quadrature (Q) demodulation