MPL4700-MMSM-SMT-Limiter Series

MMSM-Surface-Mount-Limiter

Catalog

MMSM-Surface-Mount-Limiter

Part	Package / Case	Operating Temperature [Min]	Operating Temperature [Max]	Capacitance @ Vr, F	Voltage - Peak Reverse (Max) [Max]	Diode Type	Power Dissipation (Max) [Max]	Resistance @ If, F	Supplier Device Package
Microchip Technology MPL4703-406	0402 (1005 Metric)	-55 °C	150 °C	0.3 pF	25 V	PIN - Single	10 W	3 Ohm	0402
Microchip Technology MPL4702-406/TR	0402 (1005 Metric)	-55 °C	150 °C	3 pF		PIN - Single	10 W	2 Ohm	0402
Microchip Technology MPL4702-406	0402 (1005 Metric)	-55 °C	150 °C	3 pF		PIN - Single	10 W	2 Ohm	0402
Microchip Technology MPL4703-406/TR	0402 (1005 Metric)	-55 °C	150 °C	0.3 pF	25 V	PIN - Single	10 W	3 Ohm	0402
Microchip Technology MPL4700-206/TR	0402 (1005 Metric)	-55 °C	150 °C	0.15 pF	25 V	PIN - Single	10 W	2 Ohm	0402
Microchip Technology MPL4701-206/TR	0402 (1005 Metric)	-55 °C	150 °C	0.2 pF	15 V	PIN - Single	10 W	2.5 Ohm	0402
Microchip Technology MPL4700-206	0402 (1005 Metric)	-55 °C	150 °C	0.15 pF	25 V	PIN - Single	10 W	2 Ohm	0402
Microchip Technology MPL4703-206/TR	0402 (1005 Metric)	-55 °C	150 °C	0.3 pF	25 V	PIN - Single	10 W	3 Ohm	0402

Catalog

MMSM-Surface-Mount-Limiter

Key Features

• * Up to 10W incident RF power handling

• * Antiparallel configuration available

• * Low parasitics

• * LP = 0.02nH Typical

• * CP = 0.04pF TypicalBroadband Performance through X-Band

• * Available on Tape & Reel or on Film Frame for pick & place

• * Small, SOD 323 Footprint

• * RoHS Compliant

Description

The MPL4700 Series utilize the new and unique MMSM technology. MMSM provides package/device integration at the wafer fabrication level. Since the cathode and anode interconnections utilize precision photolitographic techniques rather than wire bonds, parasitic package inductance is tightly controlled. The package parasitics provide smooth non-resonant functionality through X band.