
Catalog
4-ch, 1.65-V to 3.6-V buffers with 3-state outputs
Key Features
• Operates From 1.65 V to 3.6 VMax tpdof 2.8 ns at 3.3 V±24-mA Output Drive at 3.3 VLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)Operates From 1.65 V to 3.6 VMax tpdof 2.8 ns at 3.3 V±24-mA Output Drive at 3.3 VLatch-Up Performance Exceeds 250 mA Per JESD 17ESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged-Device Model (C101)
Description
AI
This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCCoperation.
The SN74ALVC125 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
This quadruple bus buffer gate is designed for 1.65-V to 3.6-V VCCoperation.
The SN74ALVC125 features independent line drivers with 3-state outputs. Each output is disabled when the associated output-enable (OE)\ input is high.
To ensure the high-impedance state during power up or power down, OE\ should be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.