AD9520-1 Series

12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.5 GHz VCO

Catalog

12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.5 GHz VCO

Part	Secondary Attributes	Secondary Attributes [Max]	Utilized IC / Part	Contents	Primary Attributes [Max]	Primary Attributes [Min]	Supplied Contents	Function	Type	Package / Case	Divider/Multiplier	Input	Output	Voltage - Supply [Max]	Voltage - Supply [Min]	Operating Temperature [Max]	Operating Temperature [Min]	Ratio - Input:Output [custom]	Frequency - Max [Max]	Mounting Type	Supplier Device Package	Number of Circuits
Analog Devices AD9520-4/PCBZ	Accepts CMOS LVDS LVPECL	250 MHz	AD9520-4	Board(s)	1.8 GHz	1.4 GHz	Board(s)	Clock Generator	Timing
Analog Devices AD9520-2/PCBZ			AD9520-2				Board(s)	Clock Generator	Timing
Analog Devices AD9520-1BCPZ-REEL7									Clock Generator Fanout Distribution	64-VFQFN Exposed Pad CSP	Yes/No	CMOS LVDS LVPECL	CMOS LVPECL	3.465 V	3.135 V	85 °C	-40 °C	2:12 2:24	2.65 GHz	Surface Mount	64-LFCSP-VQ (9x9)	1
Analog Devices AD9520-4BCPZ-REEL7									Clock Generator Fanout Distribution	64-VFQFN Exposed Pad CSP	Yes/No	CMOS LVDS LVPECL	CMOS LVPECL	3.465 V	3.135 V	85 °C	-40 °C	2:12 2:24	1.8 GHz	Surface Mount	64-LFCSP-VQ (9x9)	1
Analog Devices AD9520-0/PCBZ			AD9520-0	Board(s)			Board(s)	Clock Generator	Timing
Analog Devices AD9520-5BCPZ									Clock Generator Fanout Distribution	64-VFQFN Exposed Pad CSP	Yes/No	CMOS LVDS LVPECL	CMOS LVPECL	3.465 V	3.135 V	85 °C	-40 °C	2:12 2:24	2.4 GHz	Surface Mount	64-LFCSP-VQ (9x9)	1
Analog Devices AD9520-5/PCBZ			AD9520-5				Board(s)	Clock Generator	Timing

Catalog

12 LVPECL/24 CMOS Output Clock Generator with Integrated 2.5 GHz VCO

Key Features

• Low phase noise, phase-locked loop (PLL)On-chip VCO tunes from 1.4 GHz to 1.8 GHzOptional external 3.3 V/5 V VCO/VCXO to 2.4 GHz1 differential or 2 single-ended reference inputsAccepts CMOS, LVDS, or LVPECL references to 250 MHzAccepts 16.62 MHz to 33.3 MHz crystal for reference inputOptional reference clock doublerReference monitoring capabilityAutomatic/manual reference holdover and reference switchover modes, with revertive switchingGlitch-free switchover between referencesAutomatic recovery from holdoverDigital or analog lock detect, selectableOptional zero delay operation

• On-chip VCO tunes from 1.4 GHz to 1.8 GHz

• Optional external 3.3 V/5 V VCO/VCXO to 2.4 GHz

• 1 differential or 2 single-ended reference inputs

• Accepts CMOS, LVDS, or LVPECL references to 250 MHz

• Accepts 16.62 MHz to 33.3 MHz crystal for reference input

• Optional reference clock doubler

• Reference monitoring capability

• Automatic/manual reference holdover and reference switchover modes, with revertive switching

• Glitch-free switchover between references

• Automatic recovery from holdover

• Digital or analog lock detect, selectable

• Optional zero delay operation

• Twelve 1.6 GHz LVPECL outputs divided into 4 groupsEach group of 3 outputs shares a 1-to-32 divider with phase delayAdditive output jitter as low as 225 fs rmsChannel-to-channel skew grouped outputs < 16 psEach LVPECL output can be configured as 2 CMOS outputs (for fOUT≤ 250 MHz)

• Each group of 3 outputs shares a 1-to-32 divider with phase delay

• Additive output jitter as low as 225 fs rms

• Channel-to-channel skew grouped outputs < 16 ps

• Each LVPECL output can be configured as 2 CMOS outputs (for fOUT≤ 250 MHz)

• Automatic synchronization of all outputs on power-up

• Manual output synchronization available

• SPI- and I2C-compatible serial control port

• 64-lead LFCSP

• Nonvolatile EEPROM stores configuration settings

Description

The AD9520-11provides a multioutput clock distribution function with sub-picosecond jitter performance, along with an on-chip PLL and VCO. The on-chip VCO tunes from 2.27 GHz to 2.65 GHz. An external 3.3 V/5 V VCO/VCXO of up to 2.4 GHz can also be used.The AD9520 serial interface supports both SPI and I2C®ports. An in-package EEPROM can be programmed through the serial interface and store user-defined register settings for power-up and chip reset.The AD9520 features 12 LVPECL outputs in four groups. Any of the 1.6 GHz LVPECL outputs can be reconfigured as two 250 MHz CMOS outputs.Each group of outputs has a divider that allows both the divide ratio (from 1 to 32) and the phase (coarse delay) to be set.The AD9520 is available in a 64-lead LFCSP and can be operated from a single 3.3 V supply. The external VCO can have an operating voltage up to 5.5 V. A separate output driver power supply can be from 2.375 V to 3.465 VThe AD9520 is specified for operation over the standard industrial range of −40°C to +85°C.1The AD9520 is used throughout this data sheet to refer to all the members of the AD9520 family. However, when AD9520-1 is used, it is referring to that specific member of the AD9520 family.ApplicationsLow jitter, low phase noise clock distributionClock generation and translation for SONET, 10Ge, 10G FC, and other 10 Gbps protocolsForward error correction (G.710)Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEsHigh performance wireless transceiversATE and high performance instrumentationBroadband infrastructures