Catalog
Quad, 16-Bit, 2.8 GSPS, TxDAC+®Digital-to-Analog Converter
Key Features
• Supports input data rate >1 GSPS
• Proprietary low spurious and distortion design6-carrier GSM IMD = 77 dBc at 75 MHz IFSFDR = 82 dBc at dc IF, −9 dBFSFlexible 8-lane JESD204B interfaceSupport quad or dual DAC mode at 2.8 GSPS
• 6-carrier GSM IMD = 77 dBc at 75 MHz IF
• SFDR = 82 dBc at dc IF, −9 dBFS
• Flexible 8-lane JESD204B interface
• Support quad or dual DAC mode at 2.8 GSPS
• Multiple chip synchronizationFixed latencyData generator latency compensation
• Fixed latency
• Data generator latency compensation
• Selectable 1×, 2×, 4×, 8× interpolation filterLow power architecture
• Low power architecture
• Input signal power detectionEmergency stop for downstream analog circuitry protection
• Emergency stop for downstream analog circuitry protection
• Transmit enable function allows extra power saving
• High performance, low noise phase-locked loop (PLL) clock multiplier
• Digital inverse sinc filter
• Low power: 1.6 W at 1.6 GSPS, 1.7 W at 2.0 GSPS, full operating conditions
• 88-lead LFCSP with exposed pad
Description
AI
The AD9144 is a quad, 16-bit, high dynamic range digital-to-analog converter (DAC) that provides a maximum sample rate of 2.8 GSPS, permitting a multicarrier generation up to the Nyquist frequency. The DAC outputs are optimized to interface seamlessly with theADRF6720analog quadrature modulator (AQM) from Analog Devices, Inc. An optional 3-wire or 4-wire serial port interface (SPI) provides for programming/readback of many internal parameters. Full-scale output current can be programmed over a typical range of 13.9 mA to 27.0 mA. The AD9144 is available in an 88-lead LFCSP.Product HighlightsGreater than 1 GHz, ultrawide complex signal bandwidth enables emerging wideband and multiband wireless applications.Advanced low spurious and distortion design techniques provide high quality synthesis of wideband signals from baseband to high intermediate frequencies.JESD204B Subclass 1 support simplifies multichip synchronization in software and hardware design.Fewer pins for data interface width with a serializer/deserializer (SERDES) JESD204B eight-lane interface.Programmable transmit enable function allows easy design balance between power consumption and wake-up time.Small package size with 12 mm × 12 mm footprint.ApplicationsWireless communications3G/4G W-CDMA base stationsWideband repeatersSoftware defined radiosWideband communicationsPoint-to-pointLocal multipoint distribution service (LMDS) and multichannel multipoint distribution service (MMDS)Transmit diversity, multiple input/multiple output (MIMO)InstrumentationAutomated test equipment
