SN74AUP1G240 Series

Single 0.8-V to 3.6-V low power inverter with 3-state outputs

Catalog

Single 0.8-V to 3.6-V low power inverter with 3-state outputs

Part	Number of Elements	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case	Number of Bits per Element	Voltage - Supply [Min]	Voltage - Supply [Max]	Mounting Type	Supplier Device Package	Logic Type	Output Type	Supplier Device Package [x]	Supplier Device Package [y]
Texas Instruments SN74AUP1G240YFPR	1	4 mA	4 mA	85 °C	-40 °C	6-XFBGA DSBGA	1	0.8 V	3.6 V	Surface Mount	6-DSBGA	Buffer Inverting	3-State
Texas Instruments SN74AUP1G240DBVR	1	4 mA	4 mA	85 °C	-40 °C	SC-74A SOT-753	1	0.8 V	3.6 V	Surface Mount	SOT-23-5	Buffer Inverting	3-State
Texas Instruments SN74AUP1G240DCKR	1	4 mA	4 mA	85 °C	-40 °C	5-TSSOP SC-70-5 SOT-353	1	0.8 V	3.6 V	Surface Mount	SC-70-5	Buffer Inverting	3-State
Texas Instruments SN74AUP1G240DSFR	1	4 mA	4 mA	85 °C	-40 °C	6-XFDFN	1	0.8 V	3.6 V	Surface Mount	6-SON (1x1)	Buffer Inverting	3-State
Texas Instruments SN74AUP1G240YZPR	1	4 mA	4 mA	85 °C	-40 °C	5-XFBGA DSBGA	1	0.8 V	3.6 V	Surface Mount	5-DSBGA	Buffer Inverting	3-State	1.4	0.9
Texas Instruments SN74AUP1G240DCKT	1	4 mA	4 mA	85 °C	-40 °C	5-TSSOP SC-70-5 SOT-353	1	0.8 V	3.6 V	Surface Mount	SC-70-5	Buffer Inverting	3-State
Texas Instruments SN74AUP1G240DBVT	1	4 mA	4 mA	85 °C	-40 °C	SC-74A SOT-753	1	0.8 V	3.6 V	Surface Mount	SOT-23-5	Buffer Inverting	3-State
Texas Instruments SN74AUP1G240DPWR	1	4 mA	4 mA	85 °C	-40 °C	4-XFDFN Exposed Pad	1	0.8 V	3.6 V	Surface Mount	5-X2SON (0.8x0.8)	Buffer Inverting	3-State

Catalog

Single 0.8-V to 3.6-V low power inverter with 3-state outputs

Key Features

• Latch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)Available in the Texas Instruments NanoStar™ PackageLow Static-Power ConsumptionICC= 0.9 µA MaximumLow Dynamic-Power ConsumptionCpd= 4.2 pF at 3.3 V TypicalLow Input CapacitanceCI= 1.5 pF TypicalLow Noise – Overshoot and Undershoot<10% of VCCInput-Disable Feature Allows Floating Input ConditionsIoffSupports Partial Power-Down-Mode OperationInput Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the InputWide Operating VCCRange of 0.8 V to 3.6 VOptimized for 3.3-V Operation3.6-V I/O Tolerant to Support Mixed-Mode Signal Operationtpd= 4.7 ns Maximum at 3.3 VSuitable for Point-to-Point ApplicationsLatch-Up Performance Exceeds 100 mA Per JESD 78, Class IIESD Performance Tested Per JESD 222000-V Human-Body Model(A114-B, Class II)1000-V Charged-Device Model (C101)Available in the Texas Instruments NanoStar™ PackageLow Static-Power ConsumptionICC= 0.9 µA MaximumLow Dynamic-Power ConsumptionCpd= 4.2 pF at 3.3 V TypicalLow Input CapacitanceCI= 1.5 pF TypicalLow Noise – Overshoot and Undershoot<10% of VCCInput-Disable Feature Allows Floating Input ConditionsIoffSupports Partial Power-Down-Mode OperationInput Hysteresis Allows Slow Input Transition and Better Switching Noise Immunity at the InputWide Operating VCCRange of 0.8 V to 3.6 VOptimized for 3.3-V Operation3.6-V I/O Tolerant to Support Mixed-Mode Signal Operationtpd= 4.7 ns Maximum at 3.3 VSuitable for Point-to-Point Applications

Description

The AUP family is TI’s premier solution to the industry’s low power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (seeAUP – The Lowest-Power Family). This buffer/driver is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. This device has the input-disable feature, which allows floating input signals. To assure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device. The AUP family is TI’s premier solution to the industry’s low power needs in battery-powered portable applications. This family assures a very low static and dynamic power consumption across the entire VCCrange of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (seeAUP – The Lowest-Power Family). This buffer/driver is a single line driver with a 3-state output. The output is disabled when the output-enable (OE) input is high. This device has the input-disable feature, which allows floating input signals. To assure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. NanoStar™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs when the device is powered down. This inhibits current backflow into the device which prevents damage to the device.