DP83867CR Series

Extended temperature, robust low-latency gigabit Ethernet PHY transceiver with SGMII

Catalog

Extended temperature, robust low-latency gigabit Ethernet PHY transceiver with SGMII

Part	Standards	Supplier Device Package	Voltage - Supply	Operating Temperature [Max]	Operating Temperature [Min]	Function	Interface	Current - Supply	Protocol	Package / Case
Texas Instruments DP83867CSRGZR	10/100/1000 Base-TX PHY	48-VQFN (7x7)	1.1 V 2.5 V	70 °C	0 °C	Physical Layer Controller	Serial	157 mA	Ethernet	48-VFQFN Exposed Pad
Texas Instruments DP83867CSRGZT	10/100/1000 Base-TX PHY	48-VQFN (7x7)	1.1 V 2.5 V	70 °C	0 °C	Physical Layer Controller	Serial	157 mA	Ethernet	48-VFQFN Exposed Pad
Texas Instruments DP83867CRRGZR	10/100/1000 Base-TX PHY	48-VQFN (7x7)	1.1 V 2.5 V	70 °C	0 °C	Physical Layer Controller	Serial	157 mA	Ethernet	48-VFQFN Exposed Pad
Texas Instruments DP83867IRRGZT	10/100/1000 Base-TX PHY	48-VQFN (7x7)	1.1 V 2.5 V	85 °C	-40 °C	Physical Layer Controller	Serial	157 mA	Ethernet	48-VFQFN Exposed Pad
Texas Instruments DP83867IRPAPR	10/100/1000 Base-TX PHY	64-HTQFP (10x10)	1.1 V 2.5 V	85 °C	-40 °C	Physical Layer Controller	Serial	157 mA	Ethernet	64-PowerTQFP
Texas Instruments DP83867ERGZT	10/100/1000 Base-TX PHY	48-VQFN (7x7)	1.1 V 2.5 V	105 ░C	-40 °C	Physical Layer Controller	Serial		Ethernet	48-VFQFN Exposed Pad
Texas Instruments DP83867CRRGZT	10/100/1000 Base-TX PHY	48-VQFN (7x7)	1.1 V 2.5 V	70 °C	0 °C	Physical Layer Controller	Serial	157 mA	Ethernet	48-VFQFN Exposed Pad

Catalog

Extended temperature, robust low-latency gigabit Ethernet PHY transceiver with SGMII

Key Features

• Ultra low RGMII latency TX < 90ns, RX < 290nsTime Sensitive Network (TSN) compliantLow power consumption 457mWExceeds 8000V IEC 61000-4-2 ESD protectionMeets EN55011 class B emission standards16 programmable RGMII delay modes on RX/TXIntegrated MDI termination resistorsProgrammable MII/GMII/RGMII termination impedanceWoL (Wake-on-LAN) packet detection25MHz or 125MHz synchronized clock outputStart of Frame Detect for IEEE 1588 time stampRJ45 mirror modeFully compatible to IEEE 802.3 10BASE-Te, 100BASE-TX, and 1000BASE-T SpecificationCable diagnosticsMII, GMII and RGMII MAC interface optionsConfigurable I/O voltage (3.3V, 2.5V, 1.8V)Fast link drop modeJTAG supportUltra low RGMII latency TX < 90ns, RX < 290nsTime Sensitive Network (TSN) compliantLow power consumption 457mWExceeds 8000V IEC 61000-4-2 ESD protectionMeets EN55011 class B emission standards16 programmable RGMII delay modes on RX/TXIntegrated MDI termination resistorsProgrammable MII/GMII/RGMII termination impedanceWoL (Wake-on-LAN) packet detection25MHz or 125MHz synchronized clock outputStart of Frame Detect for IEEE 1588 time stampRJ45 mirror modeFully compatible to IEEE 802.3 10BASE-Te, 100BASE-TX, and 1000BASE-T SpecificationCable diagnosticsMII, GMII and RGMII MAC interface optionsConfigurable I/O voltage (3.3V, 2.5V, 1.8V)Fast link drop modeJTAG support

Description

The DP83867 device is a robust, low power, fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX and 1000BASE-T Ethernet protocols. Optimized for ESD protection, the DP83867 exceeds 8kV IEC 61000-4-2 (direct contact). The DP83867 is designed for easy implementation of 10/100/1000Mbps Ethernet LANs. DP83867 interfaces directly to twisted pair media via an external transformer. This device interfaces directly to the MAC layer through the IEEE 802.3 Standard Media Independent Interface (MII), the IEEE 802.3 Gigabit Media Independent Interface (GMII) or Reduced GMII (RGMII). The QFP package supports MII/GMII/RGMII whereas the QFN package supports RGMII. The DP83867 provides precision clock synchronization, including a synchronous Ethernet clock output. DP83867 has low latency and provides IEEE 1588 Start of Frame Detection. The DP83867 consumes only 490mW (PAP) and 457mW (RGZ) under full operating power. Wake on LAN can be used to lower system power consumption. The DP83867 device is a robust, low power, fully featured Physical Layer transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX and 1000BASE-T Ethernet protocols. Optimized for ESD protection, the DP83867 exceeds 8kV IEC 61000-4-2 (direct contact). The DP83867 is designed for easy implementation of 10/100/1000Mbps Ethernet LANs. DP83867 interfaces directly to twisted pair media via an external transformer. This device interfaces directly to the MAC layer through the IEEE 802.3 Standard Media Independent Interface (MII), the IEEE 802.3 Gigabit Media Independent Interface (GMII) or Reduced GMII (RGMII). The QFP package supports MII/GMII/RGMII whereas the QFN package supports RGMII. The DP83867 provides precision clock synchronization, including a synchronous Ethernet clock output. DP83867 has low latency and provides IEEE 1588 Start of Frame Detection. The DP83867 consumes only 490mW (PAP) and 457mW (RGZ) under full operating power. Wake on LAN can be used to lower system power consumption.