LP2998-Q1 Series

DDR Termination Regulator for Automotive Applications

Catalog

DDR Termination Regulator for Automotive Applications

Part	Package / Case	Package / Case [y]	Package / Case [x]	Voltage - Input [Min]	Voltage - Input [Max]	Supplier Device Package	Applications	Mounting Type	Operating Temperature [Min]	Operating Temperature [Max]	Number of Outputs	Utilized IC / Part	Board Type	Channels per IC	Supplied Contents	Current - Output	Regulator Type	Grade	Qualification
Texas Instruments LP2998MAX/NOPB	8-SOIC	3.9 mm	0.154 in	2.2 V	5.5 V	8-SOIC	Converter DDR	Surface Mount	-40 °C	125 ¯C	1
Texas Instruments LP2998MRE/NOPB	8-PowerSOIC	3.9 mm	0.154 in	2.2 V	5.5 V	8-SO PowerPad	Converter DDR	Surface Mount	-40 °C	125 ¯C	1
Texas Instruments LP2998EVAL				2.2 V	5.5 V							LP2998	Fully Populated	1 - Single	Board(s)	1.5 A	Positive Fixed
Texas Instruments LP2998QMRX/NOPB	8-PowerSOIC	3.9 mm	0.154 in	2.2 V	5.5 V	8-SO PowerPad	Converter DDR	Surface Mount	-40 °C	125 ¯C	1							Automotive	AEC-Q100
Texas Instruments LP2998MAE/NOPB	8-SOIC	3.9 mm	0.154 in	2.2 V	5.5 V	8-SOIC	Converter DDR	Surface Mount	-40 °C	125 ¯C	1
Texas Instruments LP2998MR/NOPB	8-PowerSOIC	3.9 mm	0.154 in	2.2 V	5.5 V	8-SO PowerPad	Converter DDR	Surface Mount	-40 °C	125 ¯C	1
Texas Instruments LP2998MRX/NOPB	8-PowerSOIC	3.9 mm	0.154 in	2.2 V	5.5 V	8-SO PowerPad	Converter DDR	Surface Mount	-40 °C	125 ¯C	1

Catalog

DDR Termination Regulator for Automotive Applications

Key Features

• AEC-Q100 Test Guidance with the following results(SO PowerPAD-8):Device HBM ESD Classification Level H1CJunction Temperature Range –40°C to 125°C1.35 V Minimum VDDQSource and Sink CurrentLow Output Voltage OffsetNo External Resistors RequiredLinear TopologySuspend to Ram (STR) FunctionalityLow External Component CountThermal ShutdownAEC-Q100 Test Guidance with the following results(SO PowerPAD-8):Device HBM ESD Classification Level H1CJunction Temperature Range –40°C to 125°C1.35 V Minimum VDDQSource and Sink CurrentLow Output Voltage OffsetNo External Resistors RequiredLinear TopologySuspend to Ram (STR) FunctionalityLow External Component CountThermal Shutdown

Description

The LP2998 linear regulator is designed to meet JEDEC SSTL-2 and JEDEC SSTL-18 specifications for termination of DDR-SDRAM and DDR2 memory. The device also supports DDR3 and DDR3L VTT bus termination with VDDQmin of 1.35 V. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5 A continuous current and transient peaks up to 3 A in the application as required for DDR-SDRAM termination. The LP2998 also incorporates a VSENSE pin to provide superior load regulation and a VREFoutput as a reference for the chipset and DIMMs. An additional feature found on the LP2998 is an active low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. WhenSDis pulled low the VTToutput will tri-state providing a high impedance output, but, VREFwill remain active. A power savings advantage can be obtained in this mode through lower quiescent current. The LP2998 linear regulator is designed to meet JEDEC SSTL-2 and JEDEC SSTL-18 specifications for termination of DDR-SDRAM and DDR2 memory. The device also supports DDR3 and DDR3L VTT bus termination with VDDQmin of 1.35 V. The device contains a high-speed operational amplifier to provide excellent response to load transients. The output stage prevents shoot through while delivering 1.5 A continuous current and transient peaks up to 3 A in the application as required for DDR-SDRAM termination. The LP2998 also incorporates a VSENSE pin to provide superior load regulation and a VREFoutput as a reference for the chipset and DIMMs. An additional feature found on the LP2998 is an active low shutdown (SD) pin that provides Suspend To RAM (STR) functionality. WhenSDis pulled low the VTToutput will tri-state providing a high impedance output, but, VREFwill remain active. A power savings advantage can be obtained in this mode through lower quiescent current.