MC74VHC74 Series

Dual D Flip-Flop with Set and Reset

Catalog

Dual D Flip-Flop with Set and Reset

Part	Current - Quiescent (Iq)	Package / Case [x]	Package / Case [y]	Package / Case	Function	Number of Elements	Max Propagation Delay @ V, Max CL	Output Type	Number of Bits per Element	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Operating Temperature [Max]	Operating Temperature [Min]	Mounting Type	Trigger Type	Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Clock Frequency	Input Capacitance	Supplier Device Package	Package / Case [custom]	Package / Case [custom]	Operating Temperature [Max]	Operating Temperature [Min]	Grade	Qualification
ON Semiconductor 74VHC74MX	2 µA	0.154 in	3.9 mm	14-SOIC	Reset Set(Preset)	2	9.3 ns	Complementary	1	8 mA	8 mA	85 °C	-40 °C	Surface Mount	Positive Edge	D-Type	5.5 V	2 V	115 MHz	4 pF
ON Semiconductor 74VHC74MTCX	2 µA			14-TSSOP	Reset Set(Preset)	2	9.3 ns	Complementary	1	8 mA	8 mA	85 °C	-40 °C	Surface Mount	Positive Edge	D-Type	5.5 V	2 V	115 MHz	4 pF	14-TSSOP	0.173 "	4.4 mm
ON Semiconductor 74VHC74SJX	2 µA	0.209 "	5.3 mm	14-SOIC	Reset Set(Preset)	2	9.3 ns	Complementary	1	8 mA	8 mA	85 °C	-40 °C	Surface Mount	Positive Edge	D-Type	5.5 V	2 V	115 MHz	4 pF	14-SOP
ON Semiconductor 74VHC74M	2 µA	0.154 in	3.9 mm	14-SOIC	Reset Set(Preset)	2	9.3 ns	Complementary	1	8 mA	8 mA	85 °C	-40 °C	Surface Mount	Positive Edge	D-Type	5.5 V	2 V	115 MHz	4 pF
ON Semiconductor MC74VHC74D	2 µA	0.154 in	3.9 mm	14-SOIC	Reset Set(Preset)	2	9.3 ns	Complementary	1	8 mA	8 mA			Surface Mount	Positive Edge	D-Type	5.5 V	2 V	115 MHz	4 pF				125 °C	-55 °C
ON Semiconductor NLV74VHC74DTR2G	2 µA			14-TSSOP	Reset Set(Preset)	2	9.3 ns	Complementary	1	8 mA	8 mA			Surface Mount	Positive Edge	D-Type	5.5 V	2 V	115 MHz	4 pF	14-TSSOP	0.173 "	4.4 mm	125 °C	-55 °C	Automotive	AEC-Q100
ON Semiconductor 74VHC74MTC	2 µA			14-TSSOP	Reset Set(Preset)	2	9.3 ns	Complementary	1	8 mA	8 mA	85 °C	-40 °C	Surface Mount	Positive Edge	D-Type	5.5 V	2 V	115 MHz	4 pF	14-TSSOP	0.173 "	4.4 mm
ON Semiconductor MC74VHC74ML1
ON Semiconductor MC74VHC74DT	2 µA			14-TSSOP	Reset Set(Preset)	2	9.3 ns	Complementary	1	8 mA	8 mA			Surface Mount	Positive Edge	D-Type	5.5 V	2 V	115 MHz	4 pF	14-TSSOP	0.173 "	4.4 mm	125 °C	-55 °C
ON Semiconductor 74VHC74MX	2 µA	0.154 in	3.9 mm	14-SOIC	Reset Set(Preset)	2	9.3 ns	Complementary	1	8 mA	8 mA	85 °C	-40 °C	Surface Mount	Positive Edge	D-Type	5.5 V	2 V	115 MHz	4 pF

Catalog

Dual D Flip-Flop with Set and Reset

Key Features

• High Speed: fmax= 170MHz (Typ) at VCC= 5V

• Low Power Dissipation: ICC= 2µA (Max) at TA= 25 C

• High Noise Immunity: VNIH= VNIL= 28% VCC

• Power Down Protection Provided on Inputs

• Balanced Propagation Delays

• Designed for 2V to 5.5V Operating Range

• Low Noise: VOLP= 0.8V (Max)

• Pin and Function Compatible with Other Standard Logic Families

• Latchup Performance Exceeds 300mA

• ESD Performance: HBM > 2000V; Machine Model > 200V

• Chip Complexity: 128 FETs or 32 Equivalent Gates

• Pb-Free Packages are Available

Description

The MC74VHC74 is an advanced high speed CMOS D-type flip-flop fabricated with silicon gate CMOS technology. It achieves high speed operation similar to equivalent Bipolar Schottky TTL while maintaining CMOS low power dissipation.The signal level applied to the D input is transferred to Q output during the positive going transition of the Clock pulse.Reset (RD) and Set (SD) are independent of the Clock (CP) and are accomplished by setting the appropriate input Low.The internal circuit is composed of three stages, including a buffer output which provides high noise immunity and stable output. The inputs tolerate voltages up to 7V, allowing the interface of 5V systems to 3V systems.