74ALVCH16823DGG Series

18-bit bus-interface D-type flip-flop with reset and enable; 3-state

Catalog

18-bit bus-interface D-type flip-flop with reset and enable; 3-state

Part	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Package / Case [y]	Package / Case	Package / Case [x]	Mounting Type	Supplier Device Package	Input Capacitance	Voltage - Supply [Min]	Voltage - Supply [Max]	Max Propagation Delay @ V, Max CL	Number of Bits per Element [custom]	Output Type	Clock Frequency	Number of Elements	Operating Temperature [Max]	Operating Temperature [Min]	Type	Trigger Type
Nexperia USA Inc. 74ALVCH16823DGG,11	24 mA	24 mA	6.1 mm	56-TFSOP	0.24 in	Surface Mount	56-TSSOP	5 pF	2.3 V 3 V	2.7 V 3.6 V	3.7 ns	9	Tri-State	350 MHz	2	85 C	-40 ¯C	D-Type	Positive Edge

Catalog

18-bit bus-interface D-type flip-flop with reset and enable; 3-state

Description

The 74ALVCH16823 is an 18-bit edge-triggered flip-flop featuring separate D-type inputs for each flip-flop and 3-state outputs for bus oriented applications. Incorporates bushold data inputs which eliminate the need for external pull-up resistors to hold unused inputs. The 74ALVCH16823 consists of two sections of nine edge-triggered flip-flops. A clock (nCP) input, an output-enable (nOE) input, a master reset (nMR) input and a clock-enable (nCE) input are provided for each total 9-bit section.