74HC175D Series

Quad D-type flip-flop with reset; positive-edge trigger

Catalog

Quad D-type flip-flop with reset; positive-edge trigger

Part	Current - Quiescent (Iq)	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Output Type	Input Capacitance	Type	Number of Bits per Element	Trigger Type	Max Propagation Delay @ V, Max CL	Voltage - Supply [Max]	Voltage - Supply [Min]	Package / Case	Package / Case	Operating Temperature [Max]	Operating Temperature [Min]	Clock Frequency	Number of Elements	Supplier Device Package	Mounting Type
Nexperia USA Inc. 74HC175D,653	8 ÁA	5.2 mA	5.2 mA	Complementary	3.5 pF	D-Type	4	Positive Edge	30 ns	6 V	2 V	16-SOIC	0.154 in 3.9 mm	125 °C	-40 °C	89 MHz	1	16-SO	Surface Mount

Catalog

Quad D-type flip-flop with reset; positive-edge trigger

Description

The 74HC175; 74HCT175 is a quad positive-edge triggered D-type flip-flop with individual data inputs (Dn) and complementary outputs (Qn andQn). The common clock (CP) and master reset (MR) inputs load and reset all flip-flops simultaneously. The D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. A LOW onMRcauses the flip-flops and outputs to be reset LOW. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC.