NDS352AP Series

P-Channel Logic Level Enhancement Mode Field Effect Transistor -30V, -0.9A, 300mΩ

Catalog

P-Channel Logic Level Enhancement Mode Field Effect Transistor -30V, -0.9A, 300mΩ

Part	Package / Case	Technology	Rds On (Max) @ Id, Vgs	Drain to Source Voltage (Vdss)	Drive Voltage (Max Rds On, Min Rds On)	Supplier Device Package	Current - Continuous Drain (Id) @ 25°C	Vgs(th) (Max) @ Id	Power Dissipation (Max) [Max]	Gate Charge (Qg) (Max) @ Vgs	Vgs (Max)	Operating Temperature [Min]	Operating Temperature [Max]	Mounting Type	FET Type
ON Semiconductor NDS352AP	SC-59 SOT-23-3 TO-236-3	MOSFET (Metal Oxide)	300 mOhm	30 V	4.5 V 10 V	SOT-23-3	900 mA	2.5 V	500 mW	3 nC	20 V	-55 °C	150 °C	Surface Mount	P-Channel

Catalog

P-Channel Logic Level Enhancement Mode Field Effect Transistor -30V, -0.9A, 300mΩ

Key Features

-0.9 A, -30 VrDS(ON)= 0.5 Ω @ VGS= -4.5 VrDS(ON)= 0.3 Ω @ VGS= -10 V

• Industry Standard Outline SOT-23 Surface Mount Package Using Proprietary SuperSOT™-3 Design for Superior Thermal and Electrical Capabilities.

• High Density Cell Design for Extremely Low rDS(ON)

• Exceptional On-Resistance and Maximum DC Current Capability

Description

These P -Channel logic level enhancement mode power field effect transistors are produced using ON Semiconductor's proprietary, high cell density, DMOS technology. This very high density process is especially tailored to minimize on-state resistance. These devices are particularly suited for low voltage applications such as notebook computer power management, portable electronics, and other battery powered circuits where fast high-side switching, and low in-line power loss are needed in a very small outline surface mount package.