SN74LVC1G10 Series

Single 3-input, 1.65-V to 5.5-V NAND gate

Catalog

Single 3-input, 1.65-V to 5.5-V NAND gate

Part	Operating Temperature [Max]	Operating Temperature [Min]	Logic Type	Supplier Device Package	Number of Inputs	Current - Quiescent (Max) [Max]	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Number of Circuits	Package / Case	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Current - Output High, Low [y]	Current - Output High, Low [x]	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]
Texas Instruments SN74LVC1G10DCKR	125 °C	-40 °C	NAND Gate	SC-70-6	3	10 µA	0.8 V	0.7 V	1	6-TSSOP SC-88 SOT-363	1.7 V	2 V	32 mA	32 mA	Surface Mount	5.5 V	1.65 V
Texas Instruments SN74LVC1G10DSFR	125 °C	-40 °C	NAND Gate	6-SON (1x1)	3	10 µA	0.8 V	0.7 V	1	6-XFDFN	1.7 V	2 V	32 mA	32 mA	Surface Mount	5.5 V	1.65 V
Texas Instruments SN74LVC1G10DCKRG4	125 °C	-40 °C	NAND Gate	SC-70-6	3	10 µA	0.8 V	0.7 V	1	6-TSSOP SC-88 SOT-363	1.7 V	2 V	32 mA	32 mA	Surface Mount	5.5 V	1.65 V
Texas Instruments SN74LVC1G10DRYR	125 °C	-40 °C	NAND Gate	6-SON (1.45x1)	3	10 µA	0.8 V	0.7 V	1	6-UFDFN	1.7 V	2 V	32 mA	32 mA	Surface Mount	5.5 V	1.65 V

Catalog

Single 3-input, 1.65-V to 5.5-V NAND gate

Key Features

• Available in the Texas Instruments NanoFree PackageSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VProvides Down Translation to VCCMax tpdof 3.8 ns at 3.3 VLow Power Consumption, 10-μA Max ICC±24-mA Output Drive at 3.3 VIoffSupports Live Insertion, Partial-Power-Down Mode, and Back Drive ProtectionLatch-Up Performance Exceeds 100 mA per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged Device Model (C101)Available in the Texas Instruments NanoFree PackageSupports 5-V VCCOperationInputs Accept Voltages to 5.5 VProvides Down Translation to VCCMax tpdof 3.8 ns at 3.3 VLow Power Consumption, 10-μA Max ICC±24-mA Output Drive at 3.3 VIoffSupports Live Insertion, Partial-Power-Down Mode, and Back Drive ProtectionLatch-Up Performance Exceeds 100 mA per JESD 78, Class IIESD Protection Exceeds JESD 222000-V Human-Body Model (A114-A)200-V Machine Model (A115-A)1000-V Charged Device Model (C101)

Description

The SN74LVC1G10 performs the Boolean function Y =A • B • Cor Y =A+B+Cin positive logic. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The SN74LVC1G10 performs the Boolean function Y =A • B • Cor Y =A+B+Cin positive logic. NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the die as the package. This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.