
TUSB1211 Series
High Speed 480 Mbps USB 2.0 OTG Transceiver with BC 1.2 Support
Manufacturer: Texas Instruments
Catalog
High Speed 480 Mbps USB 2.0 OTG Transceiver with BC 1.2 Support
Key Features
• USB2.0 PHY Transceiver Chip, Designed toInterface With a USB Controller Through a ULPIInterface, Fully Compliant With:Universal Serial Bus SpecificationRev. 2.0On-The-Go Supplement to the USB 2.0SpecificationRev. 1.3UTMI+ Low Pin Interface (ULPI) SpecificationRev. 1.1DP/DM Line External Component Compensation(Patent #US7965100 B1)Interfaces to Host, Peripheral, and OTG DeviceCores; Optimized for Portable Devices or SystemASICs With Built-in USB OTG Device CoreComplete USB OTG Physical Front-EndUSB Battery Charger Detection FeatureUSB HS Start-of-Frame Clock Output FeatureAvailable on SOF Pin Can be Used to SynchronizeAnother Application, for Example Audio, With theUSB Packet StreamULPI Interface:I/O Interface (1.8 V) Optimized for Non-Terminated 50-Ω Line ImpedanceULPI CLOCK Pin (60 MHz) Supports Both Inputand Output Clock ConfigurationsFully Programmable ULPI-Compliant Register SetFull Industrial-Grade Operating TemperatureRange from –40°C to 85°CAvailable in a TFBGA36 Ball PackageUSB2.0 PHY Transceiver Chip, Designed toInterface With a USB Controller Through a ULPIInterface, Fully Compliant With:Universal Serial Bus SpecificationRev. 2.0On-The-Go Supplement to the USB 2.0SpecificationRev. 1.3UTMI+ Low Pin Interface (ULPI) SpecificationRev. 1.1DP/DM Line External Component Compensation(Patent #US7965100 B1)Interfaces to Host, Peripheral, and OTG DeviceCores; Optimized for Portable Devices or SystemASICs With Built-in USB OTG Device CoreComplete USB OTG Physical Front-EndUSB Battery Charger Detection FeatureUSB HS Start-of-Frame Clock Output FeatureAvailable on SOF Pin Can be Used to SynchronizeAnother Application, for Example Audio, With theUSB Packet StreamULPI Interface:I/O Interface (1.8 V) Optimized for Non-Terminated 50-Ω Line ImpedanceULPI CLOCK Pin (60 MHz) Supports Both Inputand Output Clock ConfigurationsFully Programmable ULPI-Compliant Register SetFull Industrial-Grade Operating TemperatureRange from –40°C to 85°CAvailable in a TFBGA36 Ball Package
Description
AI
The TUSB1211 device is a USB2.0 transceiver chip, designed to interface with a USB controller through a ULPI interface. The device supports all USB2.0 data rates (high-speed 480 Mbps, full-speed 12 Mbps and low-speed 1.5 Mbps), and is compliant to both Host and Peripheral modes. The TUSB1211 also supports a UART mode and legacy ULPI serial modes.
The TUSB1211 device supports the OTG (Ver1.3) optional addendum to the USB 2.0 Specification, including Host Negotiation Protocol (HNP) and Session Request Protocol (SRP). TUSB1211 also supports USB Battery Charging Specification Ver1.1 integrating a charger detection module for sensing and control on DP/DM lines, and ACA (Accessory Charger Adapter) detection and control on ID line.
The DP/DM external component compensation in the transmitter compensates for variations in the series impendence to match with the data line impedance and the receiver input impedance, to limit data reflections and, thereby, improve eye diagrams.
The TUSB1211 device is a USB2.0 transceiver chip, designed to interface with a USB controller through a ULPI interface. The device supports all USB2.0 data rates (high-speed 480 Mbps, full-speed 12 Mbps and low-speed 1.5 Mbps), and is compliant to both Host and Peripheral modes. The TUSB1211 also supports a UART mode and legacy ULPI serial modes.
The TUSB1211 device supports the OTG (Ver1.3) optional addendum to the USB 2.0 Specification, including Host Negotiation Protocol (HNP) and Session Request Protocol (SRP). TUSB1211 also supports USB Battery Charging Specification Ver1.1 integrating a charger detection module for sensing and control on DP/DM lines, and ACA (Accessory Charger Adapter) detection and control on ID line.
The DP/DM external component compensation in the transmitter compensates for variations in the series impendence to match with the data line impedance and the receiver input impedance, to limit data reflections and, thereby, improve eye diagrams.