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VQFN (RHB)
Integrated Circuits (ICs)

DP83826ERHBR

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Texas Instruments

LOW LATENCY 10/100-MBPS PHY WITH MII INTERFACE AND ENHANCED MODE

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VQFN (RHB)
Integrated Circuits (ICs)

DP83826ERHBR

Active
Texas Instruments

LOW LATENCY 10/100-MBPS PHY WITH MII INTERFACE AND ENHANCED MODE

Technical Specifications

Parameters and characteristics for this part

SpecificationDP83826ERHBR
Current - Supply55 mA
FunctionController
InterfaceMII, RMII
Operating Temperature [Max]105 °C
Operating Temperature [Min]-40 °C
Package / Case32-VFQFN Exposed Pad
ProtocolEthernet
Standards10/100 Base-T/TX PHY
Supplier Device Package32-VQFN (5x5)
Voltage - Supply [Max]1.98 V, 3.6 V
Voltage - Supply [Min]3 V, 1.62 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 4.58
10$ 3.04
25$ 2.64
100$ 2.19
250$ 1.97
500$ 1.84
1000$ 1.72
Digi-Reel® 1$ 4.58
10$ 3.04
25$ 2.64
100$ 2.19
250$ 1.97
500$ 1.84
1000$ 1.72
Tape & Reel (TR) 3000$ 1.59
6000$ 1.53
Texas InstrumentsLARGE T&R 1$ 2.40
100$ 2.11
250$ 1.48
1000$ 1.19

Description

General part information

DP83826E Series

The DP83826 offers low and deterministic latency, low power and supports 10BASE-Te, 100BASE-TX Ethernet protocols to meet stringent requirements in real-time industrial Ethernet systems. The device includes hardware bootstraps to achieve fast link-up time, fast link-drop detection modes and dedicated reference CLKOUT to clock synchronize other modules on the systems.

The two configurable modes are BASIC standard Ethernet mode that uses a common Ethernet pinout, and ENHANCED Ethernet mode which supports standard Ethernet mode and multiple industrial Ethernet fieldbus applications with the additional features and hardware bootstraps configuration.

The DP83826 offers low and deterministic latency, low power and supports 10BASE-Te, 100BASE-TX Ethernet protocols to meet stringent requirements in real-time industrial Ethernet systems. The device includes hardware bootstraps to achieve fast link-up time, fast link-drop detection modes and dedicated reference CLKOUT to clock synchronize other modules on the systems.