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56-TSSOP
Integrated Circuits (ICs)

SN74LVTH16646DLR

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Texas Instruments

3.3 V ABT 16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

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56-TSSOP
Integrated Circuits (ICs)

SN74LVTH16646DLR

Active
Texas Instruments

3.3 V ABT 16-BIT BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVTH16646DLR
Current - Output High, Low [custom]64 mA
Current - Output High, Low [custom]32 mA
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output Type3-State
Package / Case0.295 in
Package / Case56-BSSOP
Package / Case7.5 mm
Supplier Device Package56-SSOP
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 2.85
10$ 2.56
25$ 2.41
100$ 2.06
250$ 1.93
500$ 1.69
Digi-Reel® 1$ 2.85
10$ 2.56
25$ 2.41
100$ 2.06
250$ 1.93
500$ 1.69
Tape & Reel (TR) 1000$ 1.40
2000$ 1.30
5000$ 1.26
Texas InstrumentsLARGE T&R 1$ 2.14
100$ 1.77
250$ 1.27
1000$ 0.96

Description

General part information

SN74LVTH16646 Series

The 'LVTH16646 devices are 16-bit bus transceivers designed for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.

These devices can be used as two 8-bit transceivers or one 16-bit transceiver. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the 'LVTH16646 devices.

Output-enable (OE\) and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port may be stored in either register or in both. The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The circuitry used for select control eliminates the typical decoding glitch that occurs in a multiplexer during the transition between stored and real-time data. DIR determines which bus receives data when OE\ is low. In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register.