Specification	CDC319DB

Differential - Input:Output	False
Frequency - Max [Max]	100 MHz
Mounting Type	Surface Mount
Number of Circuits	1
Operating Temperature [Max]	70 °C
Operating Temperature [Min]	0 °C
Output	LVTTL, TTL
Package / Case	28-SSOP
Package / Case [custom]	0.209 in
Package / Case [custom]	5.3 mm
Ratio - Input:Output [custom]	1:10
Supplier Device Package	28-SSOP
Type	Fanout Buffer (Distribution), Data
Voltage - Supply [Max]	3.465 V
Voltage - Supply [Min]	3.135 V

CDC319 Series

Part	Output	Operating Temperature [Max]	Ratio - Input:Output [custom]	Package / Case [custom]	Package / Case	Package / Case [custom]	Number of Circuits	Frequency - Max [Max]	Mounting Type	Voltage - Supply [Max]	Voltage - Supply [Min]	Type	Supplier Device Package
Texas Instruments CDC319DBR	LVTTL TTL	70 °C	1:10	0.209 in	28-SSOP	5.3 mm	1	100 MHz	Surface Mount	3.465 V	3.135 V	Fanout Buffer (Distribution) Data	28-SSOP
Texas Instruments CDC319DBRG4	LVTTL TTL	70 °C	1:10	0.209 in	28-SSOP	5.3 mm	1	100 MHz	Surface Mount	3.465 V	3.135 V	Fanout Buffer (Distribution) Data	28-SSOP
Texas Instruments CDC319DB	LVTTL TTL	70 °C	1:10	0.209 in	28-SSOP	5.3 mm	1	100 MHz	Surface Mount	3.465 V	3.135 V	Fanout Buffer (Distribution) Data	28-SSOP

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Tube	150	$ 8.23
Texas Instruments	TUBE	1	$ 9.25
		100	$ 8.11
		250	$ 5.68
		1000	$ 4.58

Description

General part information

CDC319 Series

The CDC319 is a high-performance clock buffer that distributes one input (A) to 10 outputs (Y) with minimum skew for clock distribution. The CDC319 operates from a 3.3-V power supply, and is characterized for operation from 0°C to 70°C.

The device provides a standard mode (100K-bits/s) I2C serial interface for device control. The implementation is as a slave/receiver. The device address is specified in the I2C device address table. Both of the I2C inputs (SDATA and SCLOCK) provide integrated pullup resistors (typically 140 k) and are 5-V tolerant.

Three 8-bit I2C registers provide individual enable control for each of the outputs. All outputs default to enabled at powerup. Each output can be placed in a disabled mode with a low-level output when a low-level control bit is written to the control register. The registers are write only and must be accessed in sequential order (i.e., random access of the registers is not supported).

Documents

Technical documentation and resources

1-Line To 10-Line Clock Driver datasheet (Rev. A)

Data sheet