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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ACT534DBR |
|---|---|
| Clock Frequency | 100 MHz |
| Current - Output High, Low | 24 mA |
| Current - Quiescent (Iq) | 4 çA |
| Function | Standard |
| Input Capacitance | 4.5 pF |
| Max Propagation Delay @ V, Max CL | 11.5 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 1 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Tri-State, Inverted |
| Package / Case | 20-SSOP |
| Supplier Device Package | 20-SSOP |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
SN74ACT534 Series
Octal Edge-Triggered D-Type Flip-Flops With 3-State Outputs
| Part | Voltage - Supply [Min] | Voltage - Supply [Max] | Type | Clock Frequency | Supplier Device Package | Current - Quiescent (Iq) | Current - Output High, Low | Function | Number of Elements | Operating Temperature [Max] | Operating Temperature [Min] | Trigger Type | Max Propagation Delay @ V, Max CL | Output Type | Input Capacitance | Package / Case | Number of Bits per Element | Mounting Type | Package / Case [y] | Package / Case [y] | Package / Case | Package / Case | Package / Case [x] |
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
Texas Instruments | 4.5 V | 5.5 V | D-Type | 100 MHz | 20-SSOP | 4 çA | 24 mA | Standard | 1 | 85 °C | -40 °C | Positive Edge | 11.5 ns | Tri-State Inverted | 4.5 pF | 20-SSOP | 8 | Surface Mount | |||||
 Texas Instruments | 4.5 V | 5.5 V | D-Type | 100 MHz | 20-SOIC | 4 çA | 24 mA | Standard | 1 | 85 °C | -40 °C | Positive Edge | 11.5 ns | Tri-State Inverted | 4.5 pF | 20-SOIC | 8 | Surface Mount | 0.295 in | 7.5 mm | |||
 Texas Instruments | 4.5 V | 5.5 V | D-Type | 100 MHz | 20-PDIP | 4 çA | 24 mA | Standard | 1 | 85 °C | -40 °C | Positive Edge | 11.5 ns | Tri-State Inverted | 4.5 pF | 20-DIP | 8 | Through Hole | 7.62 mm | 0.3 in | |||
 Texas Instruments | 4.5 V | 5.5 V | D-Type | 100 MHz | 20-TSSOP | 4 çA | 24 mA | Standard | 1 | 85 °C | -40 °C | Positive Edge | 11.5 ns | Tri-State Inverted | 4.5 pF | 20-TSSOP | 8 | Surface Mount | 4.4 mm | 0.173 in | |||
 Texas Instruments | 4.5 V | 5.5 V | D-Type | 100 MHz | 20-SOIC | 4 çA | 24 mA | Standard | 1 | 85 °C | -40 °C | Positive Edge | 11.5 ns | Tri-State Inverted | 4.5 pF | 20-SOIC | 8 | Surface Mount | 0.295 in | 7.5 mm | |||
Texas Instruments | 4.5 V | 5.5 V | D-Type | 100 MHz | 20-SSOP | 4 çA | 24 mA | Standard | 1 | 85 °C | -40 °C | Positive Edge | 11.5 ns | Tri-State Inverted | 4.5 pF | 20-SSOP | 8 | Surface Mount | |||||
 Texas Instruments | 4.5 V | 5.5 V | D-Type | 100 MHz | 20-TSSOP | 4 çA | 24 mA | Standard | 1 | 85 °C | -40 °C | Positive Edge | 11.5 ns | Tri-State Inverted | 4.5 pF | 20-TSSOP | 8 | Surface Mount | 4.4 mm | 0.173 in | |||
Texas Instruments | 4.5 V | 5.5 V | D-Type | 100 MHz | 20-SSOP | 4 çA | 24 mA | Standard | 1 | 85 °C | -40 °C | Positive Edge | 11.5 ns | Tri-State Inverted | 4.5 pF | 20-SSOP | 8 | Surface Mount | |||||
 Texas Instruments | 4.5 V | 5.5 V | D-Type | 100 MHz | 20-TSSOP | 4 çA | 24 mA | Standard | 1 | 85 °C | -40 °C | Positive Edge | 11.5 ns | Tri-State Inverted | 4.5 pF | 20-TSSOP | 8 | Surface Mount | 4.4 mm | 0.173 in |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
SN74ACT534 Series
These octal edge-triggered D-type flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. The devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
On the positive transition of the clock (CLK) input, the Q\ outputs are set to the complements of the logic levels set up at the data (D) inputs.
A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
Documents
Technical documentation and resources