SN74LVTH162374DLR
Active3.3-V ABT 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
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SN74LVTH162374DLR
Active3.3-V ABT 16-BIT EDGE-TRIGGERED D-TYPE FLIP-FLOPS WITH 3-STATE OUTPUTS
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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LVTH162374DLR |
|---|---|
| Clock Frequency | 160 MHz |
| Current - Output High, Low [custom] | 12 mA |
| Current - Output High, Low [custom] | 12 mA |
| Current - Quiescent (Iq) | 190 çA |
| Function | Standard |
| Input Capacitance | 3 pF |
| Max Propagation Delay @ V, Max CL | 5.3 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 8 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Tri-State, Non-Inverted |
| Package / Case | 48-BSSOP |
| Package / Case [y] | 0.295 in |
| Package / Case [y] | 7.5 mm |
| Supplier Device Package | 48-SSOP |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 3.6 V |
| Voltage - Supply [Min] | 2.7 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 1.57 | |
| 10 | $ 1.41 | |||
| 25 | $ 1.33 | |||
| 100 | $ 1.13 | |||
| 250 | $ 1.06 | |||
| 500 | $ 0.93 | |||
| Digi-Reel® | 1 | $ 1.57 | ||
| 10 | $ 1.41 | |||
| 25 | $ 1.33 | |||
| 100 | $ 1.13 | |||
| 250 | $ 1.06 | |||
| 500 | $ 0.93 | |||
| Tape & Reel (TR) | 1000 | $ 0.77 | ||
| 2000 | $ 0.72 | |||
| 5000 | $ 0.69 | |||
| 10000 | $ 0.67 | |||
| Texas Instruments | LARGE T&R | 1 | $ 1.30 | |
| 100 | $ 1.00 | |||
| 250 | $ 0.74 | |||
| 1000 | $ 0.53 | |||
Description
General part information
SN74LVTH162374 Series
The 'LVTH162374 devices are 16-bit edge-triggered D-type flip-flops with 3-state outputs designed for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
These devices can be used as two 8-bit flip-flops or one 16-bit flip-flop. On the positive transition of the clock (CLK), the Q outputs of the flip-flop take on the logic levels set up at the D inputs.
A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and the increased drive provide the capability to drive bus lines without need for interface or pullup components.
Documents
Technical documentation and resources
