
952926CGLF
ObsoletePROGRAMMABLE TIMING CONTROL HUB™ FOR NEXT GEN P4™ PROCESSOR
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952926CGLF
ObsoletePROGRAMMABLE TIMING CONTROL HUB™ FOR NEXT GEN P4™ PROCESSOR
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | 952926CGLF |
|---|---|
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Output | Clock |
| Package / Case | 48-TFSOP |
| Package / Case | 0.24 in |
| Package / Case [custom] | 6.1 mm |
| Supplier Device Package | 48-TSSOP |
| Voltage - Supply | 3.3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
Description
General part information
952926C Series
The 952926 is a 48-pin clock chip for VIA VX/CX 700 style chipsets. When used with a fanout DDR buffer, such as the 93788, it provides all the necessary clock signals for such a system.The 952926 is part of a line of IDT clock generators and buffers called TCH™ (Timing Control Hub). This part incorporates the newest clock technology which offers more robust features and functionality. Employing the use of a serially programmable I2C interface, this device can adjust the output clocks by configuring the frequency setting, the output divider ratios, selecting the ideal spread percentage, the output skew, the output strength, and enabling/disabling each individual output clock. M/N control can configure output frequency with resolution up to 0.1MHz increment.
Documents
Technical documentation and resources