
AM6526BACDXEAF
ActiveDUAL ARM® CORTEX®-A53 AND DUAL ARM CORTEX-R5F SITARA™ PROCESSOR WITH GIGABIT PRU-ICSS
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AM6526BACDXEAF
ActiveDUAL ARM® CORTEX®-A53 AND DUAL ARM CORTEX-R5F SITARA™ PROCESSOR WITH GIGABIT PRU-ICSS
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Technical Specifications
Parameters and characteristics for this part
| Specification | AM6526BACDXEAF |
|---|---|
| Additional Interfaces | TDM, I2S, I2C, MMC/SD/SDIO, McASP, CAN, UART, QSPI, McSPI |
| Co-Processors/DSP | GPU PowerVR SGX544-MP1 3D |
| Core Processor | ARM® Cortex®-R5F, ARM® Cortex®-A53 |
| Display & Interface Controllers | LVDS, MIPI-CSI |
| Ethernet | 10 Mbps, 1000 Mbps, 100 Mbps |
| Ethernet | 2 |
| Graphics Acceleration | True |
| Mounting Type | Surface Mount |
| Number of Cores/Bus Width [custom] | 32 Bit |
| Number of Cores/Bus Width [custom] | 2 |
| Operating Temperature [custom] | -40 °C, 105 °C |
| Package / Case | FCBGA, 784-LFBGA |
| RAM Controllers | DDR3, LPDDR4, DDR4 |
| Security Features | SHA, MD5, 3DES, DRBG, PKA, AES |
| Speed | 1.1 GHz |
| Speed | 400 MHz |
| USB | USB 2.0 (1), USB 3.1 (1) |
| Voltage - I/O | 1.2 V, 1.35 V, 3.3 V, 1.8 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Tray | 60 | $ 79.42 | |
| Texas Instruments | JEDEC TRAY (5+1) | 1 | $ 91.20 | |
| 100 | $ 81.06 | |||
| 250 | $ 66.64 | |||
| 1000 | $ 59.60 | |||
Description
General part information
AM6526 Series
AM654x and AM652xSitara™ processorsare Arm applications processors built to meet the complex processing needs of modern industry 4.0 embedded products.
The AM654x and AM652x devices combine four or two Arm Cortex-A53 cores with a dual Arm Cortex-R5F MCU subsystem which includes features intended to help customers achieve their functional safety goals for their end products and three Gigabit industrial communications subsystems (PRU_ICSSG) to create a SoC capable of high-performance industrial controls with industrial connectivity and processing for functional safety applications. AM65xx is currently undergoing assessment to be certified by TÜV SÜD according to IEC 61508.
The four Arm Cortex-A53 cores in the AM654x are arranged in two dual-core clusters with shared L2 memory to create two processing channels. The two Arm Cortex-A53 cores in the AM652x are available in a single dual-core cluster and two single-core cluster options. Extensive ECC is included on on-chip memory, peripherals, and interconnect for reliability. The SoC as a whole includes features intended to help customers design systems that can achieve their functional safety goals (assessment pending with TÜV SÜD). Cryptographic acceleration and secure boot are available on some AM654x and AM652x devices in addition to granular firewalls managed by the DMSC.
Documents
Technical documentation and resources