Integrated Circuits (ICs)

SN74AVCH2T45DCUT

Active

DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AAN 3-STATE OUTPUTS

Deep-Dive with AI

Search across all available documentation for this part.

DocumentsSemiconductor Packing Material Electrostatic Discharge (ESD) Protection LCD Module Interface Application Clip +15

Integrated Circuits (ICs)

SN74AVCH2T45DCUT

Active

Texas Instruments

DUAL-BIT DUAL-SUPPLY BUS TRANSCEIVER WITH CONFIGURABLE VOLTAGE TRANSLATION AAN 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsSemiconductor Packing Material Electrostatic Discharge (ESD) Protection LCD Module Interface Application Clip +15

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74AVCH2T45DCUT

Channel Type	Bidirectional
Channels per Circuit	2
Data Rate	500 Mbps
Mounting Type	Surface Mount
Number of Circuits	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	Tri-State, Non-Inverted
Package / Case	8-VFSOP
Package / Case [y]	2.3 mm
Package / Case [y]	0.091 in
Translator Type	Voltage Level
Voltage - VCCA [Max]	3.6 V
Voltage - VCCA [Min]	1.2 V
Voltage - VCCB [Max]	3.6 V
Voltage - VCCB [Min]	1.2 V

SN74AVCH2T45 Series

Dual-Bit Dual-Supply Bus Transceiver With Configurable Voltage Translation Aan 3-State Outputs

Part	Channels per Circuit	Supplier Device Package	Channel Type	Voltage - VCCB [Max]	Voltage - VCCB [Min]	Voltage - VCCA [Min]	Voltage - VCCA [Max]	Translator Type	Data Rate	Mounting Type	Number of Circuits	Operating Temperature [Max]	Operating Temperature [Min]	Output Type	Package / Case	Package / Case [y]	Package / Case [y]
Texas Instruments SN74AVCH2T45YZPR	2	8-DSBGA	Bidirectional	3.6 V	1.2 V	1.2 V	3.6 V	Voltage Level	500 Mbps	Surface Mount	1	85 °C	-40 °C	Non-Inverted Tri-State	8-XFBGA DSBGA
Texas Instruments SN74AVCH2T45DCTT	2	SM8	Bidirectional	3.6 V	1.2 V	1.2 V	3.6 V	Voltage Level	500 Mbps	Surface Mount	1	85 °C	-40 °C	Non-Inverted Tri-State
Texas Instruments SN74AVCH2T45DCUT	2		Bidirectional	3.6 V	1.2 V	1.2 V	3.6 V	Voltage Level	500 Mbps	Surface Mount	1	85 °C	-40 °C	Non-Inverted Tri-State	8-VFSOP	2.3 mm	0.091 in
Texas Instruments SN74AVCH2T45DCUR	2		Bidirectional	3.6 V	1.2 V	1.2 V	3.6 V	Voltage Level	500 Mbps	Surface Mount	1	85 °C	-40 °C	Non-Inverted Tri-State	8-VFSOP	2.3 mm	0.091 in
Texas Instruments 74AVCH2T45DCTTG4	2	SM8	Bidirectional	3.6 V	1.2 V	1.2 V	3.6 V	Voltage Level	500 Mbps	Surface Mount	1	85 °C	-40 °C	Non-Inverted Tri-State

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.48
		10	$ 1.32
		25	$ 1.26
		100	$ 1.03
	Digi-Reel®	1	$ 1.48
		10	$ 1.32
		25	$ 1.26
		100	$ 1.03
	Tape & Reel (TR)	250	$ 0.96
		500	$ 0.85
		1250	$ 0.67
		2500	$ 0.63
		6250	$ 0.60
		12500	$ 0.57
Texas Instruments	SMALL T&R	1	$ 1.10
		100	$ 0.84
		250	$ 0.62
		1000	$ 0.44

Description

General part information

SN74AVCH2T45 Series

This 2-bit non-inverting bus transceiver uses two separate configurable power-supply rails. The A ports are designed to track VCCA and accepts any supply voltage from 1.2V to 3.6V. The B ports are designed to track VCCB and accepts any supply voltage from 1.2V to 3.6V. This allows for universal low-voltage bidirectional translation and level-shifting between any of the 1.2V, 1.5V, 1.8V, 2.5V, and 3.3V voltage nodes.

The SN74AVCH2T45 is designed for asynchronous communication between two data buses. The logic levels of the direction-control (DIR pin) input activate either the B-port outputs or the A-port outputs. The device transmits data from the A bus to the B bus when the B-port outputs are activated and from the B bus to the A bus when the A-port outputs are activated. The SN74AVCH2T45 features active bus-hold circuitry, which holds unused or un-driven inputs at a valid logic state. TI does not recommend using pull-up or pull-down resistors with the bus-hold circuitry.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. The VCC isolation feature ensures that if either VCC input is at GND, then both outputs are in the high-impedance state. The bus-hold circuitry on the powered-up side always stays active.

Documents

Technical documentation and resources

SN74AVCH2T45 2-Bit, 2-Supply, Bus Transceiver with Configurable Level-Shifting and Translation and 3-State Outputs datasheet (Rev. I)

Data sheet

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

AVC Advanced Very-Low-Voltage CMOS Logic Data Book, March 2000 (Rev. C)

User guide

Selecting the Right Level Translation Solution (Rev. A)

Application note

Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)

Application note

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

Application note

AVC Logic Family Technology and Applications (Rev. A)

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators

Application note

Logic Guide (Rev. AB)

Selection guide

Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A)

Application note

Standard Linear & Logic for PCs, Servers & Motherboards

More literature

Voltage Translation Buying Guide (Rev. A)

Selection guide

Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)

Application note

SN74AVCH2T45DCUT

Deep-Dive with AI

SN74AVCH2T45DCUT

Deep-Dive with AI

Technical Specifications

SN74AVCH2T45 Series

Pricing

Description

SN74AVCH2T45 Series

Documents

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

LCD Module Interface Application Clip

Schematic Checklist - A Guide to Designing with Auto-Bidirectional Translators

SN74AVCH2T45 2-Bit, 2-Supply, Bus Transceiver with Configurable Level-Shifting and Translation and 3-State Outputs datasheet (Rev. I)

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

AVC Advanced Very-Low-Voltage CMOS Logic Data Book, March 2000 (Rev. C)

Selecting the Right Level Translation Solution (Rev. A)

Dynamic Output Control (DOC) Circuitry Technology And Applications (Rev. B)

16-Bit Widebus Logic Families in 56-Ball, 0.65-mm Pitch Very Thin Fine-Pitch BGA (Rev. B)

AVC Logic Family Technology and Applications (Rev. A)

LOGIC Pocket Data Book (Rev. B)

Schematic Checklist - A Guide to Designing With Fixed or Direction Control Translators

Logic Guide (Rev. AB)

Understanding Transient Drive Strength vs. DC Drive Strength in Level-Shifters (Rev. A)

Standard Linear & Logic for PCs, Servers & Motherboards

Voltage Translation Buying Guide (Rev. A)

Voltage Translation Between 3.3-V, 2.5-V, 1.8-V, and 1.5-V Logic Standards (Rev. B)

SN74AVCH2T45 Series