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CDIP (J)
Integrated Circuits (ICs)

CD4023BF3A

Active
Texas Instruments

CMOS TRIPLE 3-INPUT NAND GATE

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CDIP (J)
Integrated Circuits (ICs)

CD4023BF3A

Active
Texas Instruments

CMOS TRIPLE 3-INPUT NAND GATE

Technical Specifications

Parameters and characteristics for this part

SpecificationCD4023BF3A
Current - Output High, Low [custom]6.8 mA
Current - Output High, Low [custom]6.8 mA
Current - Quiescent (Max) [Max]5 µA
Input Logic Level - High [Max]11 V
Input Logic Level - High [Min]3.5 V
Input Logic Level - Low [Max]4 V
Input Logic Level - Low [Min]1.5 V
Logic TypeNAND Gate
Max Propagation Delay @ V, Max CL90 ns
Mounting TypeThrough Hole
Number of Circuits3
Number of Inputs3
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Package / Case14-CDIP
Supplier Device Package14-CDIP
Voltage - Supply [Max]18 V
Voltage - Supply [Min]3 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
Texas InstrumentsTUBE 1$ 13.46
100$ 11.76
250$ 9.06
1000$ 8.11

Description

General part information

CD4023B-MIL Series

CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.

The CD4011B, CD4012B, and CD4023B types are supplied in 14-lead hermetic dual-in-line ceramic packages (F3A suffix), 14-lead dual-in-line plastic packages (E suffix), 14-lead small-outline packages (M, MT, M96, and NSR suffixes), and 14-lead thin shrink small-outline packages (PWR suffix). The CD4011B and CD4023B types also are supplied in 14-lead thin shrink small-outline packages (PW suffix).

CD4011B, CD4012B, and CD4023B NAND gates provide the system designer with direct implementation of the NAND function and supplement the existing family of CMOS gates. All inputs and outputs are buffered.

Documents

Technical documentation and resources