DS92LV3222TVSX/NOPB
LTB20-50 MHZ 32-BIT CHANNEL LINK II DESERIALIZER
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DS92LV3222TVSX/NOPB
LTB20-50 MHZ 32-BIT CHANNEL LINK II DESERIALIZER
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Technical Specifications
Parameters and characteristics for this part
| Specification | DS92LV3222TVSX/NOPB |
|---|---|
| Data Rate | 1.6 Gbps |
| Function | Deserializer |
| Input Type | Channel Link II (LVDS) |
| Mounting Type | Surface Mount |
| Number of Inputs | 2 |
| Number of Outputs | 32 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Channel Link II (LVCMOS) |
| Package / Case | 64-TQFP |
| Supplier Device Package | 64-TQFP (10x10) |
| Voltage - Supply [Max] | 3.465 V |
| Voltage - Supply [Min] | 3.135 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 46 | $ 6.65 | |
| Tape & Reel (TR) | 1000 | $ 6.27 | ||
| Texas Instruments | LARGE T&R | 1 | $ 9.74 | |
| 100 | $ 7.94 | |||
| 250 | $ 6.24 | |||
| 1000 | $ 5.29 | |||
Description
General part information
DS92LV3222 Series
The DS92LV3221 (SER) serializes a 32-bit data bus into 2 embedded clock LVDS serial channels for a data payload rate up to 1.6 Gbps over cables such as CATx, or backplanes FR-4 traces. The companion DS92LV3222 (DES) deserializes the 2 LVDS serial data channels, de-skews channel-to-channel delay variations and converts the LVDS data stream back into a 32-bit LVCMOS parallel data bus.
On-chip data Randomization/Scrambling and DC balance encoding and selectable serializer Pre-emphasis ensure a robust, low-EMI transmission over longer, lossy cables and backplanes. The Deserializer automatically locks to incoming data without an external reference clock or special sync patterns, providing an easy "plug-and-lock" operation.
By embedding the clock in the data payload and including signal conditioning functions, the Channel-Link II SerDes devices reduce trace count, eliminate skew issues, simplify design effort and lower cable/connector cost for a wide variety of video, control and imaging applications. A built-in AT-SPEED BIST feature validates link integrity and may be used for system diagnostics.
Documents
Technical documentation and resources