Specification	SN74ABT16500BDLR

Current - Output High, Low [custom]	64 mA
Current - Output High, Low [custom]	32 mA
Mounting Type	Surface Mount
Number of Circuits	18 Bit
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Package / Case	0.295 in
Package / Case	56-BSSOP
Package / Case	7.5 mm
Supplier Device Package	56-SSOP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74ABT16500B Series

18-bit universal bus transceivers with 3-state outputs

Part	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case	Package / Case	Package / Case	Number of Circuits	Supplier Device Package	Mounting Type	Voltage - Supply [Min]	Voltage - Supply [Max]	Current - Output High, Low [custom]	Current - Output High, Low [custom]
Texas Instruments SN74ABT16500BDLG4	85 °C	-40 °C	0.295 in	56-BSSOP	7.5 mm	18 Bit	56-SSOP	Surface Mount	4.5 V	5.5 V	64 mA	32 mA
Texas Instruments SN74ABT16500BDLR	85 °C	-40 °C	0.295 in	56-BSSOP	7.5 mm	18 Bit	56-SSOP	Surface Mount	4.5 V	5.5 V	64 mA	32 mA

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 4.36
	Digi-Reel®	1	$ 4.36
	Tape & Reel (TR)	1000	$ 2.30
		2000	$ 2.19
Texas Instruments	LARGE T&R	1	$ 3.29
		100	$ 2.88
		250	$ 2.02
		1000	$ 1.63

Description

General part information

SN74ABT16500B Series

These 18-bit universal bus transceivers combine D-type latches and D-type flip-flops to allow data flow in transparent, latched, and clocked modes.

Data flow in each direction is controlled by output-enable (OEAB and OEBA\), latch-enable (LEAB and LEBA), and clock (CLKAB\ and CLKBA\) inputs. For A-to-B data flow, the device operates in the transparent mode when LEAB is high. When LEAB is low, the A data is latched if CLKAB\ is held at a high or low logic level. If LEAB is low, the A data is stored in the latch/flip-flop on the high-to-low transition of CLKAB\. OEAB is active-high. When OEAB is high, the outputs are active. When OEAB is low, the outputs are in the high-impedance state.

Data flow for B to A is similar to that of A to B but uses OEBA\, LEBA, and CLKBA\. The output enables are complementary (OEAB is active high and OEBA\ is active low).

Documents

Technical documentation and resources

SN74ABT16500BDLR

Deep-Dive with AI

SN74ABT16500BDLR

Deep-Dive with AI

Technical Specifications

SN74ABT16500B Series

Pricing

Description

SN74ABT16500B Series

Documents

Understanding Advanced Bus-Interface Products Design Guide

Live Insertion

Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)

Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)

Input and Output Characteristics of Digital Integrated Circuits

Advanced Bus Interface Logic Selection Guide

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Logic Guide (Rev. AB)

18-Bit Universal Bus Transceivers With 3-State Outputs datasheet (Rev. G)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Designing With Logic (Rev. C)

Quad Flatpack No-Lead Logic Packages (Rev. D)

TI IBIS File Creation, Validation, and Distribution Processes

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

LOGIC Pocket Data Book (Rev. B)

Implications of Slow or Floating CMOS Inputs (Rev. E)

Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Selecting the Right Level Translation Solution (Rev. A)

SN74ABT16500B Series