Specification	SN74AUP1T08DCKR

Current - Output High, Low [custom]	4 mA
Current - Output High, Low [custom]	4 mA
Current - Quiescent (Max) [Max]	500 nA
Input Logic Level - High [Max]	1.19 V
Input Logic Level - High [Min]	1.1 V
Input Logic Level - Low [Max]	0.5 V
Input Logic Level - Low [Min]	0.35 V
Logic Type	AND Gate
Max Propagation Delay @ V, Max CL	4.4 ns
Mounting Type	Surface Mount
Number of Circuits	1
Number of Inputs	2
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Package / Case	SC-70-5, 5-TSSOP, SOT-353
Supplier Device Package	SC-70-5
Voltage - Supply [Max]	3.6 V
Voltage - Supply [Min]	2.3 V

SN74AUP1T08 Series

Low Power, 1.8/2.5/3.3-V Input, 3.3-V CMOS Output, 2-Input Positive-AND Gate

Part	Package / Case	Operating Temperature [Max]	Operating Temperature [Min]	Number of Inputs	Number of Circuits	Input Logic Level - Low [Max]	Input Logic Level - Low [Min]	Supplier Device Package	Voltage - Supply [Min]	Voltage - Supply [Max]	Input Logic Level - High [Min]	Input Logic Level - High [Max]	Max Propagation Delay @ V, Max CL	Logic Type	Mounting Type	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Current - Quiescent (Max) [Max]
Texas Instruments SN74AUP1T08DCKR	5-TSSOP SC-70-5 SOT-353	85 °C	-40 °C	2	1	0.5 V	0.35 V	SC-70-5	2.3 V	3.6 V	1.1 V	1.19 V	4.4 ns	AND Gate	Surface Mount	4 mA	4 mA	500 nA

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 0.36
		10	$ 0.29
		25	$ 0.27
		100	$ 0.20
		250	$ 0.18
		500	$ 0.15
		1000	$ 0.11
	Digi-Reel®	1	$ 0.36
		10	$ 0.29
		25	$ 0.27
		100	$ 0.20
		250	$ 0.18
		500	$ 0.15
		1000	$ 0.11
	Tape & Reel (TR)	3000	$ 0.10
		6000	$ 0.10
		15000	$ 0.09
		30000	$ 0.08
		75000	$ 0.08
Texas Instruments	LARGE T&R	1	$ 0.17
		100	$ 0.12
		250	$ 0.09
		1000	$ 0.06

Description

General part information

SN74AUP1T08 Series

The SN74AUP1T08 performs the Boolean function Y = A • B or Y =/A + /Bwith designation for logic-level translation applications with output referenced to supply VCC.

AUP technology is the industrys lowest-power logic technology designed for use in extending battery-life in operating. All input levels that accept 1.8-V LVCMOS signals, while operating from either a single 3.3-V or 2.5-V VCCsupply. This product also maintains excellent signal integrity (see Figure 5-1 and Figure 5-2).

The wide VCCrange of 2.3 V to 3.6 V allows the possibility of switching output level to connect to external controllers or processors.

Documents

Technical documentation and resources

Voltage Translation Buying Guide (Rev. A)

Selection guide

Understanding Schmitt Triggers (Rev. B)

Application brief

Low Power, 1.8/2.5/3.3-V Input, 3.3-V CMOS Output, 2-Input Positive-AND Gate datasheet (Rev. A)

Data sheet

Logic Guide

Datasheet