Integrated Circuits (ICs)

SN74ABT540DBR

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8-CH, 4.5-V TO 5.5-V INVERTERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS

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Search across all available documentation for this part.

DocumentsImplications of Slow or Floating CMOS Inputs (Rev. E)Selecting the Right Level Translation Solution (Rev. A)+17

Integrated Circuits (ICs)

SN74ABT540DBR

Active

Texas Instruments

8-CH, 4.5-V TO 5.5-V INVERTERS WITH TTL-COMPATIBLE CMOS INPUTS AND 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsImplications of Slow or Floating CMOS Inputs (Rev. E)Selecting the Right Level Translation Solution (Rev. A)+17

Specifications Series Pricing Description Documents

Technical Specifications

Parameters and characteristics for this part

Specification	SN74ABT540DBR

Current - Output High, Low [custom]	64 mA
Current - Output High, Low [custom]	32 mA
Logic Type	Inverting, Buffer
Mounting Type	Surface Mount
Number of Bits per Element	8
Number of Elements	1
Operating Temperature [Max]	85 °C
Operating Temperature [Min]	-40 °C
Output Type	3-State
Package / Case	20-SSOP
Supplier Device Package	20-SSOP
Voltage - Supply [Max]	5.5 V
Voltage - Supply [Min]	4.5 V

SN74ABT540 Series

8-ch, 4.5-V to 5.5-V inverters with TTL-compatible CMOS inputs and 3-state outputs

Part	Number of Bits per Element	Number of Elements	Logic Type	Mounting Type	Supplier Device Package	Voltage - Supply [Min]	Voltage - Supply [Max]	Operating Temperature [Max]	Operating Temperature [Min]	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Package / Case	Package / Case	Package / Case	Output Type	Package / Case [y]	Package / Case [y]
Texas Instruments SN74ABT540NG4	8	1	Buffer Inverting	Through Hole	20-PDIP	4.5 V	5.5 V	85 °C	-40 °C	64 mA	32 mA	20-DIP	7.62 mm	0.3 in	3-State
Texas Instruments SN74ABT540DW	8	1	Buffer Inverting	Surface Mount	20-SOIC	4.5 V	5.5 V	85 °C	-40 °C	64 mA	32 mA	20-SOIC			3-State	0.295 in	7.5 mm
Texas Instruments SN74ABT540N	8	1	Buffer Inverting	Through Hole	20-PDIP	4.5 V	5.5 V	85 °C	-40 °C	64 mA	32 mA	20-DIP	7.62 mm	0.3 in	3-State
Texas Instruments SN74ABT540DBR	8	1	Buffer Inverting	Surface Mount	20-SSOP	4.5 V	5.5 V	85 °C	-40 °C	64 mA	32 mA	20-SSOP			3-State
Texas Instruments SN74ABT540DWR	8	1	Buffer Inverting	Surface Mount	20-SOIC	4.5 V	5.5 V	85 °C	-40 °C	64 mA	32 mA	20-SOIC			3-State	0.295 in	7.5 mm
Texas Instruments SN74ABT540NSR	8	1	Buffer Inverting	Surface Mount	20-SO	4.5 V	5.5 V	85 °C	-40 °C	64 mA	32 mA	20-SOIC	5.3 mm	0.209 "	3-State

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Digikey	Cut Tape (CT)	1	$ 1.39
		10	$ 1.25
		25	$ 1.18
		100	$ 0.97
		250	$ 0.91
		500	$ 0.80
		1000	$ 0.63
	Digi-Reel®	1	$ 1.39
		10	$ 1.25
		25	$ 1.18
		100	$ 0.97
		250	$ 0.91
		500	$ 0.80
		1000	$ 0.63
	Tape & Reel (TR)	2000	$ 0.54
		4000	$ 0.52
Texas Instruments	LARGE T&R	1	$ 1.03
		100	$ 0.79
		250	$ 0.58
		1000	$ 0.42

Description

General part information

SN74ABT540 Series

The ’ABT540 octal buffers and line drivers are ideal for driving bus lines or buffer memory address registers. The devices feature inputs and outputs on opposite sides of the package that facilitate printed circuit board layout.

The 3-state control gate is a 2-input AND gate with active-low inputs so that if either output-enable (OE1orOE2) input is high, all corresponding outputs are in the high-impedance state.

To ensure the high-impedance state during power up or power down,OEshould be tied to VCCthrough a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

Documents

Technical documentation and resources

SN74ABT540DBR

Deep-Dive with AI

SN74ABT540DBR

Deep-Dive with AI

Technical Specifications

SN74ABT540 Series

Pricing

Description

SN74ABT540 Series

Documents

Implications of Slow or Floating CMOS Inputs (Rev. E)

Selecting the Right Level Translation Solution (Rev. A)

TI IBIS File Creation, Validation, and Distribution Processes

Live Insertion

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Designing With Logic (Rev. C)

Logic Guide (Rev. AB)

Input and Output Characteristics of Digital Integrated Circuits

Quad Flatpack No-Lead Logic Packages (Rev. D)

Understanding Advanced Bus-Interface Products Design Guide

Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)

Advanced Bus Interface Logic Selection Guide

Octal Buffers/Drivers With 3-State Outputs datasheet (Rev. C)

LOGIC Pocket Data Book (Rev. B)

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

SN74ABT540 Series