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Technical Specifications
Parameters and characteristics for this part
| Specification | SN74LVCZ161284AGR |
|---|---|
| Logic Type | IEEE STD 1284 Translation Transceiver |
| Mounting Type | Surface Mount |
| Number of Bits | 19 |
| Operating Temperature [Max] | 70 °C |
| Operating Temperature [Min] | 0 °C |
| Package / Case | 48-TFSOP |
| Package / Case | 0.24 in |
| Package / Case [custom] | 6.1 mm |
| Supplier Device Package | 48-TSSOP |
| Supply Voltage [Max] | 3.6 V |
| Supply Voltage [Min] | 3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 1.27 | |
| 10 | $ 1.14 | |||
| 25 | $ 1.08 | |||
| 100 | $ 0.89 | |||
| 250 | $ 0.83 | |||
| 500 | $ 0.73 | |||
| 1000 | $ 0.58 | |||
| Digi-Reel® | 1 | $ 1.27 | ||
| 10 | $ 1.14 | |||
| 25 | $ 1.08 | |||
| 100 | $ 0.89 | |||
| 250 | $ 0.83 | |||
| 500 | $ 0.73 | |||
| 1000 | $ 0.58 | |||
| Tape & Reel (TR) | 2000 | $ 0.54 | ||
| 6000 | $ 0.51 | |||
| 10000 | $ 0.49 | |||
| Texas Instruments | LARGE T&R | 1 | $ 1.03 | |
| 100 | $ 0.80 | |||
| 250 | $ 0.59 | |||
| 1000 | $ 0.42 | |||
Description
General part information
SN74LVCZ161284A Series
The SN74LVCZ161284A is designed for 3-V to 3.6-V VCCoperation. This device provides asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements.
This device has eight bidirectional bits; data can flow in the A-to-B direction when the direction-control input (DIR) is high, and in the B-to-A direction when DIR is low. This device also has five drivers that drive the cable side, and four receivers. The SN74LVCZ161284A has one receiver dedicated to the HOST LOGIC line and a driver to drive the PERI LOGIC line.
The output drive mode is determined by the high-drive (HD) control pin. When HD is high, the outputs are in a totem-pole configuration, and in an open-drain configuration when HD is low. This meets the drive requirements as specified in the IEEE Std 1284-I (level-1 type) and IEEE Std 1284-II (level-2 type) parallel peripheral-interface specifications. Except for HOST LOGIC IN and peripheral logic out (PERI LOGIC OUT), all cable-side pins have a 1.4-kintegrated pullup resistor. The pullup resistor is switched off if the associated output driver is in the low state or if the output voltage is above VCCCABLE. If VCCCABLE is off, PERI LOGIC OUT is set to low.
Documents
Technical documentation and resources