
CAT24C256WI-GT3
ActiveEEPROM, 256 KBIT, 32K X 8BIT, I2C, 400 KHZ, SOIC, 8 PINS
Deep-Dive with AI
Search across all available documentation for this part.

CAT24C256WI-GT3
ActiveEEPROM, 256 KBIT, 32K X 8BIT, I2C, 400 KHZ, SOIC, 8 PINS
Deep-Dive with AI
Technical Specifications
Parameters and characteristics for this part
| Specification | CAT24C256WI-GT3 |
|---|---|
| Access Time | 500 ns |
| Memory Format | EEPROM |
| Memory Interface | I2C |
| Memory Organization | 32K x 8 |
| Memory Size | 32 KB |
| Memory Type | Non-Volatile |
| Mounting Type | Surface Mount |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Package / Case | 8-SOIC |
| Package / Case [x] | 0.154 in |
| Package / Case [y] | 3.9 mm |
| Supplier Device Package | 8-SOIC |
| Technology | EEPROM |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 1.8 V |
| Write Cycle Time - Word, Page | 5 ms |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 0.61 | |
| 10 | $ 0.56 | |||
| 25 | $ 0.55 | |||
| 50 | $ 0.54 | |||
| 100 | $ 0.49 | |||
| 250 | $ 0.48 | |||
| 500 | $ 0.48 | |||
| 1000 | $ 0.46 | |||
| Digi-Reel® | 1 | $ 0.61 | ||
| 10 | $ 0.56 | |||
| 25 | $ 0.55 | |||
| 50 | $ 0.54 | |||
| 100 | $ 0.49 | |||
| 250 | $ 0.48 | |||
| 500 | $ 0.48 | |||
| 1000 | $ 0.46 | |||
| Tape & Reel (TR) | 3000 | $ 0.43 | ||
| 6000 | $ 0.42 | |||
| 15000 | $ 0.40 | |||
| Newark | Each (Supplied on Full Reel) | 3000 | $ 0.44 | |
| 6000 | $ 0.43 | |||
| 12000 | $ 0.43 | |||
| 18000 | $ 0.42 | |||
| 30000 | $ 0.41 | |||
| ON Semiconductor | N/A | 1 | $ 0.35 | |
Description
General part information
CAT24C256 Series
The CAT24C256WI-GT3 is a 256kB serial CMOS Electrically Erasable Programmable Read-Only Memory (EEPROM) with 24256E-marking. It is internally organized as 32768 words of 8-bit each. It features a 64-byte page write buffer and supports the standard, fast and fast-plus I²C protocol. Write operations can be inhibited by taking the WP pin high (this protects the entire memory). External address pins make it possible to address up to eight CAT24C256 devices on the same bus. On-chip ECC (Error Correction Code) makes the device suitable for high reliability applications.
Documents
Technical documentation and resources