Specification	JM38510/05152BEA

Clock Frequency	24 MHz
Current - Output High, Low [custom]	6.8 mA
Current - Output High, Low [custom]	6.8 mA
Current - Quiescent (Iq)	20 çA
Function	Reset, Set(Preset)
Input Capacitance	5 pF
Max Propagation Delay @ V, Max CL	90 ns
Mounting Type	Through Hole
Number of Bits per Element	1
Number of Elements	2
Operating Temperature [Max]	125 °C
Operating Temperature [Min]	-55 °C
Output Type	Complementary
Package / Case	7.62 mm, 0.3 in
Package / Case	16-CDIP
Supplier Device Package	16-CDIP
Trigger Type	Positive Edge
Type	JK Type
Voltage - Supply [Max]	18 V
Voltage - Supply [Min]	3 V

CD4027B-MIL Series

CMOS Dual J-K Master-Slave Flip-Flop

Part	Trigger Type	Input Capacitance	Current - Output High, Low [custom]	Current - Output High, Low [custom]	Number of Bits per Element	Voltage - Supply [Max]	Voltage - Supply [Min]	Operating Temperature [Max]	Operating Temperature [Min]	Package / Case	Package / Case	Function	Mounting Type	Type	Clock Frequency	Current - Quiescent (Iq)	Max Propagation Delay @ V, Max CL	Output Type	Number of Elements	Supplier Device Package
Texas Instruments CD4027BF	Positive Edge	5 pF	6.8 mA	6.8 mA	1	18 V	3 V	125 °C	-55 °C	0.3 in 7.62 mm	16-CDIP	Reset Set(Preset)	Through Hole	JK Type	24 MHz	20 çA	90 ns	Complementary	2	16-CDIP
Texas Instruments M38510/05152BEA	Positive Edge	5 pF	6.8 mA	6.8 mA	1	18 V	3 V	125 °C	-55 °C	0.3 in 7.62 mm	16-CDIP	Reset Set(Preset)	Through Hole	JK Type	24 MHz	20 çA	90 ns	Complementary	2	16-CDIP
Texas Instruments JM38510/05152BEA	Positive Edge	5 pF	6.8 mA	6.8 mA	1	18 V	3 V	125 °C	-55 °C	0.3 in 7.62 mm	16-CDIP	Reset Set(Preset)	Through Hole	JK Type	24 MHz	20 çA	90 ns	Complementary	2	16-CDIP

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

Distributor	Package	Quantity	$

Texas Instruments	TUBE	1	$ 84.19
		100	$ 73.54
		250	$ 56.70
		1000	$ 50.72

Description

General part information

CD4027B-MIL Series

CD4027B is a single monolithic chip integrated circuit containing two identical complementary-symmetry J-K flip flops. Each flip-flop has provisions for individual J, K, Set, Reset, and Clock input signals. Buffered Q andQsignals are provided as outputs. This input-output arrangement provides for compatibile operation with the RCA-CD4013B dual D-type flip-flop.

The CD4027B is useful in performing control, register, and toggle functions. Logic levels present at the J and K inputs along with internal self-steering control the state of each flip-flop; changes in the flip-flop state are synchronous with the postitive-going transition of the clock pulse. Set and reset functions are independent of the clock and are initiated when a high level signal is present at either the Set or Reset input.

The CD4027B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffice), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

Documents

Technical documentation and resources

JM38510/05152BEA

Deep-Dive with AI

JM38510/05152BEA

Deep-Dive with AI

Technical Specifications

CD4027B-MIL Series

Pricing

Description

CD4027B-MIL Series

Documents

Understanding Buffered and Unbuffered CD4xxxB Series Device Characteristics

Signal Switch Data Book (Rev. A)

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

LOGIC Pocket Data Book (Rev. B)

Power-Up Behavior of Clocked Devices (Rev. B)

Logic Guide (Rev. AB)

CD4027B CMOS Dual J-K Flip Flop datasheet (Rev. D)

CD4027B-MIL Series