Zenode.ai Logo
Beta
SOIC (DW)
Integrated Circuits (ICs)

SN74LVTH374DW

Active
Texas Instruments

FLIP FLOP D-TYPE BUS INTERFACE POS-EDGE 3-ST 1-ELEMENT 20-PIN SOIC TUBE

Deep-Dive with AI

Search across all available documentation for this part.

SOIC (DW)
Integrated Circuits (ICs)

SN74LVTH374DW

Active
Texas Instruments

FLIP FLOP D-TYPE BUS INTERFACE POS-EDGE 3-ST 1-ELEMENT 20-PIN SOIC TUBE

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74LVTH374DW
Clock Frequency150 MHz
Current - Output High, Low [custom]64 mA
Current - Output High, Low [custom]32 mA
Current - Quiescent (Iq)190 çA
FunctionStandard
Input Capacitance3 pF
Max Propagation Delay @ V, Max CL4.5 ns
Mounting TypeSurface Mount
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Output TypeTri-State, Non-Inverted
Package / Case20-SOIC
Package / Case [y]0.295 in
Package / Case [y]7.5 mm
Supplier Device Package20-SOIC
Trigger TypePositive Edge
TypeD-Type
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2.7 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
ArrowN/A 1000$ 0.36
DigikeyTube 1$ 0.68
10$ 0.60
25$ 0.57
100$ 0.47
250$ 0.44
500$ 0.39
1000$ 0.36
Texas InstrumentsTUBE 1$ 0.77
100$ 0.59
250$ 0.43
1000$ 0.31

Description

General part information

SN74LVTH374-EP Series

These octal flip-flops are designed specifically for low-voltage (3.3-V) VCCoperation, but with the capability to provide a TTL interface to a 5-V system environment.

The eight flip-flops of the ’LVTH374 devices are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels set up at the data (D) inputs.

A buffered output-enable (OE)\ input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.