SN74ABT16821DLR
Active20-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
Deep-Dive with AI
Search across all available documentation for this part.
SN74ABT16821DLR
Active20-BIT BUS INTERFACE FLIP-FLOPS WITH 3-STATE OUTPUTS
Technical Specifications
Parameters and characteristics for this part
| Specification | SN74ABT16821DLR |
|---|---|
| Clock Frequency | 150 MHz |
| Current - Output High, Low [custom] | 64 mA |
| Current - Output High, Low [custom] | 32 mA |
| Current - Quiescent (Iq) | 0.5 mA |
| Function | Standard |
| Input Capacitance | 3.5 pF |
| Max Propagation Delay @ V, Max CL | 5.1 ns |
| Mounting Type | Surface Mount |
| Number of Bits per Element | 10 |
| Number of Elements | 2 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | Tri-State, Non-Inverted |
| Package / Case | 0.295 in |
| Package / Case | 56-BSSOP |
| Package / Case | 7.5 mm |
| Supplier Device Package | 56-SSOP |
| Trigger Type | Positive Edge |
| Type | D-Type |
| Voltage - Supply [Max] | 5.5 V |
| Voltage - Supply [Min] | 4.5 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Cut Tape (CT) | 1 | $ 4.80 | |
| Digi-Reel® | 1 | $ 4.80 | ||
| Tape & Reel (TR) | 1000 | $ 2.54 | ||
| 2000 | $ 2.41 | |||
| Texas Instruments | LARGE T&R | 1 | $ 3.63 | |
| 100 | $ 3.18 | |||
| 250 | $ 2.23 | |||
| 1000 | $ 1.79 | |||
Description
General part information
SN74ABT16821 Series
These 20-bit flip-flops feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing wider buffer registers, I/O ports, bidirectional bus drivers with parity, and working registers.
The 'ABT16821 can be used as two 10-bit flip-flops or one 20-bit flip-flop. The 20 flip-flops are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the device provides true data at the Q outputs.
A buffered output-enable () input can be used to place the ten outputs in either a normal logic state (high or low logic level) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.
Documents
Technical documentation and resources
