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CDIP (JT)
Integrated Circuits (ICs)

SNJ54BCT646JT

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Texas Instruments

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

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Search across all available documentation for this part.

DocumentsSN54BCT646, SN74BCT646 datasheet (Rev. D)Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)+9
CDIP (JT)
Integrated Circuits (ICs)

SNJ54BCT646JT

Active
Texas Instruments

OCTAL BUS TRANSCEIVERS AND REGISTERS WITH 3-STATE OUTPUTS

Deep-Dive with AI

DocumentsSN54BCT646, SN74BCT646 datasheet (Rev. D)Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)+9

Technical Specifications

Parameters and characteristics for this part

SpecificationSNJ54BCT646JT
Current - Output High, Low12 mA, 48 mA
Mounting TypeThrough Hole
Number of Bits per Element8
Number of Elements1
Operating Temperature [Max]125 °C
Operating Temperature [Min]-55 °C
Output Type3-State
Package / Case24-CDIP
Supplier Device Package24-CDIP
Voltage - Supply [Max]5.5 V
Voltage - Supply [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
Texas InstrumentsTUBE 1$ 55.38
100$ 49.23
250$ 40.47
1000$ 36.20

Description

General part information

SN54BCT646 Series

These devices consist of bus transceiver circuits, D-type flip-flops, and control circuitry arranged for multiplexed transmission of data directly from the input bus or from the internal registers. Data on the A or B bus is clocked into the registers on the low-to-high transition of the appropriate clock (CLKAB or CLKBA) input. Figure 1 illustrates the four fundamental bus-management functions that can be performed with the ’BCT646 devices.

Output-enable (OE)\ and direction-control (DIR) inputs are provided to control the transceiver functions. In the transceiver mode, data present at the high-impedance port can be stored in either register or in both.

The select-control (SAB and SBA) inputs can multiplex stored and real-time (transparent mode) data. The direction control (DIR) determines which bus will receive data when OE\ is low. In the isolation mode (OE\ high), A data can be stored in one register and/or B data can be stored in the other register.