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64-LQFP
Integrated Circuits (ICs)

SN74ABTH182652APM

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Texas Instruments

SCAN TEST DEVICES WITH 18-BIT TRANSCEIVERS AND REGISTERS

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64-LQFP
Integrated Circuits (ICs)

SN74ABTH182652APM

Active
Texas Instruments

SCAN TEST DEVICES WITH 18-BIT TRANSCEIVERS AND REGISTERS

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74ABTH182652APM
Logic TypeScan Test Device With Transceivers And Registers
Mounting TypeSurface Mount
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case64-LQFP
Supplier Device Package64-LQFP (10x10)
Supply Voltage [Max]5.5 V
Supply Voltage [Min]4.5 V

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyTray 160$ 17.19
Texas InstrumentsJEDEC TRAY (10+1) 1$ 21.38
100$ 18.68
250$ 14.40
1000$ 12.88

Description

General part information

SN74ABTH182652A Series

The 'ABTH18652A and 'ABTH182652A scan test devices with 18-bit bus transceivers and registers are members of the Texas Instruments SCOPETMtestability integrated-circuit family. This family of devices supports IEEE Standard 1149.1-1990 boundary scan to facilitate testing of complex circuit-board assemblies. Scan access to the test circuitry is accomplished via the 4-wire test access port (TAP) interface.

In the normal mode, these devices are 18-bit bus transceivers and registers that allow for multiplexed transmission of data directly from the input bus or from the internal registers. They can be used either as two 9-bit transceivers or one 18-bit transceiver. The test circuitry can be activated by the TAP to take snapshot samples of the data appearing at the device pins or to perform a self test on the boundary-test cells. Activating the TAP in the normal mode does not affect the functional operation of the SCOPETMbus transceivers and registers.

Data flow in each direction is controlled by clock (CLKAB and CLKBA), select (SAB and SBA), and output-enable (OEAB and) inputs. For A-to-B data flow, data on the A bus is clocked into the associated registers on the low-to-high transition of CLKAB. When SAB is low, real-time A data is selected for presentation to the B bus (transparent mode). When SAB is high, stored A data is selected for presentation to the B bus (registered mode). When OEAB is high, the B outputs are active. When OEAB is low, the B outputs are in the high-impedance state. Control for B-to-A data flow is similar to that for A-to-B data flow, but uses CLKBA, SBA, andinputs. Since theinput is active-low, the A outputs are active whenis low and are in the high-impedance state whenis high. Figure 1 illustrates the four fundamental bus-management functions that are performed with the 'ABTH18652A and 'ABTH182652A.

Documents

Technical documentation and resources

Designing With Logic (Rev. C)

Application note

Programming CPLDs Via the 'LVT8986 LASP

Application note

Power-Up 3-State (PU3S) Circuits in TI Standard Logic Devices

Application note

Logic Guide (Rev. AB)

Selection guide

Quad Flatpack No-Lead Logic Packages (Rev. D)

Application note

Semiconductor Packing Material Electrostatic Discharge (ESD) Protection

Application note

Advanced BiCMOS Technology (ABT) Logic Enables Optimal System Design (Rev. A)

Application note

An Overview of Bus-Hold Circuit and the Applications (Rev. B)

Application note

Advanced Bus Interface Logic Selection Guide

Selection guide

Scan Test Devices With 18-Bit Bus Transceivers And Registers datasheet (Rev. D)

Data sheet

TI IBIS File Creation, Validation, and Distribution Processes

Application note

Live Insertion

Application note

Family of Curves Demonstrating Output Skews for Advanced BiCMOS Devices (Rev. A)

Application note

Selecting the Right Level Translation Solution (Rev. A)

Application note

Understanding and Interpreting Standard-Logic Data Sheets (Rev. C)

Application note

Understanding Advanced Bus-Interface Products Design Guide

Application note

Bus-Interface Devices With Output-Damping Resistors Or Reduced-Drive Outputs (Rev. A)

Application note

Advanced BiCMOS Technology (ABT) Logic Characterization Information (Rev. B)

Application note

LOGIC Pocket Data Book (Rev. B)

User guide

Implications of Slow or Floating CMOS Inputs (Rev. E)

Application note

LASP Demo Board User's Guide

EVM User's guide

Input and Output Characteristics of Digital Integrated Circuits

Application note