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8-TSSOP
Integrated Circuits (ICs)

SN74CB3Q3306APW

LTB
Texas Instruments

3.3-V, 1:1 (SPST), 2-CHANNEL FET BUS SWITCH (ACTIVE LOW)

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8-TSSOP
Integrated Circuits (ICs)

SN74CB3Q3306APW

LTB
Texas Instruments

3.3-V, 1:1 (SPST), 2-CHANNEL FET BUS SWITCH (ACTIVE LOW)

Technical Specifications

Parameters and characteristics for this part

SpecificationSN74CB3Q3306APW
Circuit1 x 1:1
Independent Circuits2
Mounting TypeSurface Mount
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case8-TSSOP
Package / Case [custom]0.173 "
Package / Case [custom]4.4 mm
Supplier Device Package8-TSSOP
TypeBus Switch
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]2.3 V
Voltage Supply SourceSingle Supply

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
ArrowN/A 1$ 0.37
DigikeyTube 1$ 0.71
10$ 0.64
25$ 0.61
150$ 0.50
300$ 0.47
600$ 0.41
1050$ 0.38
Texas InstrumentsTUBE 1$ 0.75
100$ 0.58
250$ 0.43
1000$ 0.30

Description

General part information

SN74CB3Q3306A Series

The SN74CB3Q3306A is a high-bandwidth FET bus switch utilizing a charge pump to elevate the gate voltage of the pass transistor, providing a low and flat ON-state resistance (ron). The low and flat ON-state resistance allows for minimal propagation delay and supports rail-to-rail switching on the data input/output (I/O) ports. The device also features low data I/O capacitance to minimize capacitive loading and signal distortion on the data bus. Specifically designed to support high-bandwidth applications, the SN74CB3Q3306A provides an optimized interface solution ideally suited for broadband communications, networking, and data-intensive computing systems.

The SN74CB3Q3306A is organized as two 1-bit switches with separate output-enable (1OE, 2OE) inputs. It can be used as two 1-bit bus switches or as one 2-bit bus switch. WhenOEis low, the associated 1-bit bus switch is ON and the A port is connected to the B port, allowing bidirectional data flow between ports. WhenOEis high, the associated 1-bit bus switch is OFF, and a high-impedance state exists between the A and B ports.

This device is fully specified for partial-power-down applications using Ioff. The Ioffcircuitry prevents damaging current backflow through the device when it is powered down. The device has isolation during power off.