DS32EL0124SQX/NOPB
Active125 TO 312.5-MHZ FPGA-LINK DESERIALIZER WITH DDR LVDS PARALLEL INTERFACE
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DS32EL0124SQX/NOPB
Active125 TO 312.5-MHZ FPGA-LINK DESERIALIZER WITH DDR LVDS PARALLEL INTERFACE
Technical Specifications
Parameters and characteristics for this part
| Specification | DS32EL0124SQX/NOPB |
|---|---|
| Function | Deserializer |
| Grade | Automotive |
| Input Type | CML |
| Mounting Type | Surface Mount |
| Number of Inputs | 1 |
| Number of Outputs | 5 |
| Operating Temperature [Max] | 85 °C |
| Operating Temperature [Min] | -40 °C |
| Output Type | LVDS |
| Package / Case | 48-WFQFN Exposed Pad |
| Qualification | AEC-Q100 |
| Supplier Device Package | 48-WQFN (7x7) |
| Voltage - Supply | 2.5 V, 3.3 V |
Pricing
Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly
| Distributor | Package | Quantity | $ | |
|---|---|---|---|---|
| Digikey | Bulk | 52 | $ 5.81 | |
| Tape & Reel (TR) | 2500 | $ 5.28 | ||
| Texas Instruments | LARGE T&R | 1 | $ 7.40 | |
| 100 | $ 6.04 | |||
| 250 | $ 4.74 | |||
| 1000 | $ 4.02 | |||
Description
General part information
DS32EL0124 Series
The DS32EL0124/DS32ELX0124 integrates clock and data recovery modules for high-speed serial communication over FR-4 printed circuit board backplanes, balanced cables, and optical fiber. This easy-to-use chipset integrates advanced signal and clock conditioning functions, with an FPGA friendly interface.
The DS32EL0124/DS32ELX0124 deserializes up to 3.125 Gbps of high speed serial data to 5 LVDS outputs without the need for an external reference clock. With DC-balance decoding enabled, the application payload of 2.5 Gbps is deserialized to 4 LVDS outputs.
The DS32EL0124/DS32ELX01214 deserializers feature a remote sense capability to automatically signal link status conditions to its companion DS32EL0421/ELX0421 serializers without requiring an additional feedback path.
Documents
Technical documentation and resources
