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Integrated Circuits (ICs)

6PADC3101TRGERQ1

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Texas Instruments

AUTOMOTIVE 92-DB SNR LOW-POWER STEREO ADC WITH DIGITAL MICROPHONE SUPPORT AND MINIDSP

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VQFN (RGE)
Integrated Circuits (ICs)

6PADC3101TRGERQ1

Active
Texas Instruments

AUTOMOTIVE 92-DB SNR LOW-POWER STEREO ADC WITH DIGITAL MICROPHONE SUPPORT AND MINIDSP

Technical Specifications

Parameters and characteristics for this part

Specification6PADC3101TRGERQ1
Data InterfaceI2S, DSP
GradeAutomotive
Mounting TypeSurface Mount
Number of Channels [custom]2
Operating Temperature [Max]85 °C
Operating Temperature [Min]-40 °C
Package / Case24-VFQFN Exposed Pad
QualificationAEC-Q100
Sampling Rate (Per Second)96 kHz
Supplier Device Package24-VQFN (4x4)
TypeADC, Audio
Voltage - Supply [Max]3.6 V
Voltage - Supply [Min]1.65 V
Voltage Supply SourceAnalog and Digital

Pricing

Prices provided here are for design reference only. For realtime values and availability, please visit the distributors directly

DistributorPackageQuantity$
DigikeyCut Tape (CT) 1$ 2.70
10$ 2.42
25$ 2.29
100$ 1.99
250$ 1.89
500$ 1.69
1000$ 1.43
Digi-Reel® 1$ 2.70
10$ 2.42
25$ 2.29
100$ 1.99
250$ 1.89
500$ 1.69
1000$ 1.43
Tape & Reel (TR) 3000$ 1.36
6000$ 1.30
Texas InstrumentsLARGE T&R 1$ 2.26
100$ 1.87
250$ 1.34
1000$ 1.01

Description

General part information

TLV320ADC3101-Q1 Series

The TLV320ADC3101-Q1 is a low-power, stereo audio analog-to-digital converter (ADC) supporting sampling rates from 8 kHz to 96 kHz with an integrated programmable-gain amplifier providing up to 40-dB analog gain or AGC. A programmable miniDSP is provided for custom audio processing. Front-end input coarse attenuation of 0 dB, –6 dB, or off, is also provided. The inputs are programmable in a combination of single-ended or fully differential configurations. Extensive register-based power control is available via an I2C interface, enabling mono or stereo recording. Low power consumption makes the TLV320ADC3101-Q1 ideal for battery-powered portable equipment.

The AGC programs to a wide range of attack (7 ms–1.4 s) and decay (50 ms–22.4 s) times. A programmable noise-gate function is included to avoid noise pumping. Low-latency IIR filters optimized for voice and telephony are available, as well as linear-phase FIR filters optimized for audio. Programmable IIR filters are also available and may be used for sound equalization, or to remove noise components. The audio serial bus can be programmed to support I2S, left-justified, right-justified, DSP, PCM, and TDM modes. The audio bus may be operated in either master or slave mode.

A programmable integrated PLL is included for flexible clock generation and provides support for all standard audio rates from a wide range of available MCLKs, varying from 512 kHz to 50 MHz, including the most popular cases of 12-MHz, 13-MHz, 16-MHz, 19.2-MHz, and 19.68-MHz system clocks.